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Problem Debugging Custom UBL/BL solution for DM365

Scott Cloutier
Intellectual 290 points

I am implementing a board specific two stage bootloader (much like UBL + U_BOOT)  for a DM365 platform.  I am having a problem trying to debug my code when I allow my target to boot from the external onenand on this board.  While I can connect using CCS 3.3.82.13 via my XDS510USB, I loand my stage two BL into the internal IRAM on the part, but can't step there? 

I get the following error;

Can't Single Step Target Program: Error 0x00000021/-1025 Error during: Command, Execution,  An error was encounterd within the emulation driver (PTI), but the precise context is unknown

However, if I allow the RBL to boot, I can execute my stage 2 loader all day long.

Any ideas or suggestions would be appreciated!

Thanks!

 

  • 0
    TI__Expert 5955 points

    Hello,

    When using the emulator to download your stage two BL into the internal IRAM, did you execute any GEL command? Did the download complete with no error? Did you open a memory window to inspect the IRAM to see if your BL downloaded successfully? Sorry to come back with more questions but these steps can be used to debug.

    Thanks,

    Tai Nguyen

  • 0 in reply to Tai Nguyen
    Intellectual 290 points

    Initially replied via e-mail.  But just incase...

    I’ve tried two approaches.  One is not entering/loading any GEL commands/scripts.  And second loading a GEL script.  Either way, manually loading the stage 2 program completes, even if I manually set the PC to 0x00000100(start address of my stage 2 loader) in CCS when I step it jumps to an address in the AEMIF region (0x020000b4).  I wonder, since the RBL does not run at all, is there something my stage 1 loader and/or script needs to do to setup before execution can run from IRAM? 

     

    Is there RBL initialization source code someplace I can check for reference?

     

    Here is my GEL script.  My stage 1 loader does very little to enable loading the stage 2 code from the onenand.  I believe I have a 1k page that it must reside in.

     

    Thanks,

     

    Scott

     

  • 0 in reply to Scott Cloutier
    TI__Expert 5955 points

    Hi Scott,

    In the RBL we have the following code to enable the DTCM. It is possible you would need to enable the ITCM too. Can you try this? BTW, I did not see your GEL script.

    Thanks,

    Tai

     

    ;write to enable DTCM

                    ; C9_DTCM_ENBL = 0x00008019 for Davinci(16K RAM + 16K ROM)

                    ; C9_DTCM_ENBL = 0x0001001D for DM350 (32K RAM + 32K ROM)

    _c_intDM360:

                    LDR R0 , C9_DTCM_ENBL

                    MCR p15, #00, R0, c9 , c1, #0

                    NOP

     

  • 0 in reply to Tai Nguyen
    Intellectual 290 points

    Looks like that did the trick!  Here is my startup assembly code...

    ; Make sure the DTCM and ITCM internal memories are enabled

     mov  r0,#0x10000    ; Enable 32K at 0x10000.
     add  r0,r0,#0x1d
     mcr  p15, #0, r0, c9, c1, #0 ; enable DTCM

     nop

     mov  r0,#0x00000
     add  r0,r0,#0x1d    ; enable ITCM at address 0x0 length of 32k
     mcr  p15, #0, r0, c9, c1, #1 ; enable ITCM

     nop

    Seems to work fine now.