Configure GPIO as interrupt on DM365

Suhas,

Nno you can't use GPIO77 as interrrupt. 

regards,

miguel

Some additional options would be:

Interrupts coming in from PWRCTRIO[2:0] (not PWRCTRO[2:0] ) GPIO PINS can use these 3 interrupts and are mapped in the AINTC AS int#56, #57, #58 as noted in the ARM INT Table for those pins when used as GPIOs from the PRTCSS perspective.   Interrupt 29 is used for the RTC specific signals and interrupt #56/57/58 are used for PWRCTIO[2:0] gpio signals.

 regards,

miguel

Hi miguel,

any pionters on how to configure PWCTRIO as GPIO104 because already in ARM INT Table this is configured as GPIO 12.Kindlt lte us know how do configure this as GPIO in dm365.c file

Last time I was busy with my board I wanted to use PWCTRIO0 on my evmdm365 as wired to SW2 for user interaction but couldn't get the addressing right and got busy with more important stuff.  Did you resolve it yet or found another way to get input?  I would still be keen to get the function going for my feature.

Thanks, Jinh T.

hi, Jinh. 

there is another thread tell about this, please refer to 

http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/100/p/108498/519939.aspx#519939

thinks.

regards, Mike

Hi jinh,

sorry I did not check your question as I was busy and away for sometime.yeah we were able to get the interrupt working.here I am attaching the sample code which we modified for set Rising edge.we got the interrupts going and were successful in getting output.

void rtc_gpio_init()
{
    //- As generic GPIOs: (see here)
    /* interrupt mux */
    u32 addr;
    u32 reg;

    printk("************************RTC GPIO INIT****************************\n");
    addr = 0x01c40000 + 0x18;
    reg = readl(IO_ADDRESS(addr));
    writel(reg | BIT(18) | BIT(19) | BIT(20) , IO_ADDRESS(addr));

    /* Bank 6 Direction */
    addr = 0x01C67000 + 0x88;
    reg = readl(IO_ADDRESS(addr));
    writel(reg | BIT(0) , IO_ADDRESS(addr));/* 1: input */

    /* Set Rising Edge */
    addr = 0x01C67000 + 0x9C;
    reg = readl(IO_ADDRESS(addr));
    writel(reg | BIT(8) , IO_ADDRESS(addr));/* 1: enable */

#if 1
    /* Clear rising Edge*/
    addr = 0x01C67000 + 0xA0;
    reg = readl(IO_ADDRESS(addr));
    writel(reg & ~(BIT(8)) , IO_ADDRESS(addr));/* 0: clear */
#endif

    /* BINTEN : GPIO Interrupt Per-Bank Enable Register.*/
    addr = 0x01C67000 + 0x8;
    reg = readl(IO_ADDRESS(addr));
    writel(reg | BIT(6) , IO_ADDRESS(addr));/* bit 6 = 1 : Bank 6 interrupts are enabled. */
   
}

In the Dm365_gpio.pdf document which gives you set rising for Bank 0.we mapped in the similar fashion and mapped for Bank 6.

Thanks and regards

Ravi chandran