Hi,
I'm developping a H264 decoder on DM6467. In order to liberate C64x+ from waiting the HDVICP acceleators, I used ARM968 to start and wait HDVICP accelerators, when all accelerators have finished their work, ARM968 will send a command to C64x+, which trigger an interrupt in C64x+, and a semaphore is posted in the Interrupt Service Routine(ISR), so C64x+ waits all accelerators by pending the semaphore.
However, sometimes this mechanism can work, somtimes it can't. After carful debugging, I find that sometimes when C64x+ has finished the "process" function, ARM926 calls "process" function again, this trigger an exception in C64x+ before the next execution of "process" function in C64x+. From registers, it's said the excpetion is caused by fetch instructions in data section, so the feteched "instruction" is invalid, it should be a pointer problem.
When the "process" function is executed in ARM926, I don't know what happens in C64x+ before entering the "process" function, because I know so little about CE. I can't solve the problem although I can locate it. Does the usage of interrupt or semapore contradict with CE? Or the usage of interrupt or semaphore violate some principle of Davinci software architectures? As you know, there're so much principles you have to follow to develop on Davinci platforms.
Thanks!