DMA Events for I2S port 2 are missing in action

Hello Peter,

My test setup is as follows:

(1) Create four arrays named I2SleftTx, I2SRightTx, I2SLeftRx and I2SRightRx, each array is 128 long words.

(2) Use four DMA channels associated with DMA controller 1 (Channels 4,5,6 and 7).

(3) DMA Channel 4 is bound to the I2SLeftTx array and it is configured to transfer the 32 bit data from memory to the I2S LT0 and LT1 registers (mapped at address 0x2A08.

(4) DMA Channel 5 is bound to the I2SRightTx array and is configured to transfer the 32 bits of data from the array to the RT0 and RT1 registers at address 0x2A0C).

(5) DMA Channel 6 is bound to the I2SLeftRx array and it is configured to transfer the LR0 and LR1 registers (mapped at address 0x2A28) to the array.

(6) DMA Channel 7 is bound to the I2SRightRx array and it is configured to transfer the receive data received at RR0 and RR1 registers (mapped at locations 0x2A2C).

The code makes extensive use of the Chip Support Library functions and I based it on one of the examples provided in the library called CSL_I2S_DMAExample. Note that I can not use this routine because the pin mapping that I use requires me to set the EBSR register differently from the example.

Here is the code that I use......

        my_ebsr = CSL_SYSCTRL_REGS->EBSR;
        printf("%s%x%s","The EBSR value sampled in function I2S = ",my_ebsr," ! \n");
   
    /** Open the device with instance 2                            */
    hI2s = I2S_open(I2S_INSTANCE2, DMA_POLLED, I2S_CHAN_STEREO);
    if(NULL == hI2s)
    {
        status = CSL_TEST_FAILED;
    }
    else
    {
        printf ("I2S Module Instance 2 opened successfully\n");
    }

    /** Set the value for the configure structure                */
    hwConfig.dataType             = I2S_STEREO_ENABLE;
    hwConfig.loopBackMode         = I2S_LOOPBACK_ENABLE; // Loopback to test the setup
    hwConfig.fsPol                 = I2S_FSPOL_LOW;
    hwConfig.clkPol                = I2S_FALLING_EDGE;
    hwConfig.datadelay            = I2S_DATADELAY_ONEBIT;
    hwConfig.datapack            = I2S_DATAPACK_DISABLE;
    hwConfig.signext            = I2S_SIGNEXT_DISABLE;
    hwConfig.wordLen            = I2S_WORDLEN_24;
    hwConfig.i2sMode            = I2S_SLAVE;
    hwConfig.dataFormat         = I2S_DATAFORMAT_LJUST;
    hwConfig.clkDiv                = I2S_CLKDIV4; // Dont care for SLAVE MODE
    hwConfig.fsDiv                = I2S_FSDIV32; // Dont care for SLAVE MODE
    hwConfig.FError                = I2S_FSERROR_DISABLE;
    hwConfig.OuError            = I2S_OUERROR_DISABLE;

    /** Configure hardware registers                            */
    result = I2S_setup(hI2s, &hwConfig);
    if(result != CSL_SOK)
    {
        status = CSL_TEST_FAILED;
    }
    else
    {
        printf ("I2S Module Configured successfully\n");
    }
   
    /* Configure DMA channel  for I2S write */
#if (defined(CHIP_C5505_C5515) || defined(CHIP_C5504_C5514))
    dmaConfigI2S.pingPongMode = CSL_DMA_PING_PONG_DISABLE;
#endif
    dmaConfigI2S.autoMode     = CSL_DMA_AUTORELOAD_DISABLE;
    dmaConfigI2S.burstLen     = CSL_DMA_TXBURST_1WORD;
    dmaConfigI2S.trigger      = CSL_DMA_EVENT_TRIGGER;
    dmaConfigI2S.dmaEvt       = CSL_DMA_EVT_I2S2_TX;
    dmaConfigI2S.dmaInt       = CSL_DMA_INTERRUPT_DISABLE;
    dmaConfigI2S.chanDir      = CSL_DMA_WRITE;
    dmaConfigI2S.trfType      = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfigI2S.dataLen      = 512;
    dmaConfigI2S.srcAddr      = (Uint32)i2sDmaWriteLeftBuff;
    dmaConfigI2S.destAddr     = (Uint32)(0x2A08); // I2S2 Tx Left Channel register
   
    dmaLeftTxHandle = CSL_configDmaForI2s(CSL_DMA_CHAN4);   
    if(dmaLeftTxHandle == NULL)
    {
        printf("DMA Config for I2S Write Failed!\n!");
    }

    I2S_transEnable(hI2s, TRUE);

    status = DMA_start(dmaLeftTxHandle);
    if(status != CSL_SOK)
    {
        printf("I2S Dma Write Failed!!\n");
    }
    while(DMA_getStatus(dmaLeftTxHandle));

    /* Configure DMA channel  for I2S write */
#if (defined(CHIP_C5505_C5515) || defined(CHIP_C5504_C5514))
    dmaConfigI2S.pingPongMode = CSL_DMA_PING_PONG_DISABLE;
#endif
    dmaConfigI2S.autoMode     = CSL_DMA_AUTORELOAD_DISABLE;
    dmaConfigI2S.burstLen     = CSL_DMA_TXBURST_1WORD;
    dmaConfigI2S.trigger      = CSL_DMA_EVENT_TRIGGER;
    dmaConfigI2S.dmaEvt       = CSL_DMA_EVT_I2S2_TX;
    dmaConfigI2S.dmaInt       = CSL_DMA_INTERRUPT_DISABLE;
    dmaConfigI2S.chanDir      = CSL_DMA_WRITE;
    dmaConfigI2S.trfType      = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfigI2S.dataLen      = 512;
    dmaConfigI2S.srcAddr      = (Uint32)i2sDmaWriteRightBuff;
    dmaConfigI2S.destAddr     = (Uint32)(0x2A0C); // I2S2 Tx Right Channel register
   

        dmaRightTxHandle = CSL_configDmaForI2s(CSL_DMA_CHAN5);
    if(dmaRightTxHandle == NULL)
    {
        printf("DMA Config for I2S Write Failed!\n!");
    }

    I2S_transEnable(hI2s, TRUE);

    status = DMA_start(dmaRightTxHandle);
    if(status != CSL_SOK)
    {
        printf("I2S Dma Write Failed!!\n");
    }
    while(DMA_getStatus(dmaRightTxHandle));

    /* Configure DMA channel  for I2S Read */
#if (defined(CHIP_C5505_C5515) || defined(CHIP_C5504_C5514))
    dmaConfigI2S.pingPongMode = CSL_DMA_PING_PONG_DISABLE;
#endif
    dmaConfigI2S.autoMode     = CSL_DMA_AUTORELOAD_DISABLE;
    dmaConfigI2S.burstLen     = CSL_DMA_TXBURST_1WORD;
    dmaConfigI2S.trigger      = CSL_DMA_EVENT_TRIGGER;
    dmaConfigI2S.dmaEvt       = CSL_DMA_EVT_I2S2_RX;
    dmaConfigI2S.dmaInt       = CSL_DMA_INTERRUPT_DISABLE;
    dmaConfigI2S.chanDir      = CSL_DMA_READ;
    dmaConfigI2S.trfType      = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfigI2S.dataLen      = 512;
    dmaConfigI2S.srcAddr      = (Uint32)(0x2A28); // I2S2 Receive Left Channel
    dmaConfigI2S.destAddr     = (Uint32)i2sDmaReadLeftBuff;
   

    dmaLeftRxHandle = CSL_configDmaForI2s(CSL_DMA_CHAN6);   
   
    if(dmaLeftRxHandle == NULL)
    {
        printf("DMA Config for I2S Read Failed!\n!");
    }

    status = DMA_start(dmaLeftRxHandle);
    if(status != CSL_SOK)
    {
        printf("I2S Dma Read Failed!!\n");
    }
    while(DMA_getStatus(dmaLeftRxHandle));

    /* Configure DMA channel  for I2S Read */
#if (defined(CHIP_C5505_C5515) || defined(CHIP_C5504_C5514))
    dmaConfigI2S.pingPongMode = CSL_DMA_PING_PONG_DISABLE;
#endif
    dmaConfigI2S.autoMode     = CSL_DMA_AUTORELOAD_DISABLE;
    dmaConfigI2S.burstLen     = CSL_DMA_TXBURST_1WORD;
    dmaConfigI2S.trigger      = CSL_DMA_EVENT_TRIGGER;
    dmaConfigI2S.dmaEvt       = CSL_DMA_EVT_I2S2_RX;
    dmaConfigI2S.dmaInt       = CSL_DMA_INTERRUPT_DISABLE;
    dmaConfigI2S.chanDir      = CSL_DMA_READ;
    dmaConfigI2S.trfType      = CSL_DMA_TRANSFER_IO_MEMORY;
    dmaConfigI2S.dataLen      = 512;
    dmaConfigI2S.srcAddr      = (Uint32)(0x2A2C); // I2S2 Receive Right Channel
    dmaConfigI2S.destAddr     = (Uint32)i2sDmaReadRightBuff;
   

    dmaRightRxHandle = CSL_configDmaForI2s(CSL_DMA_CHAN7);   
    if(dmaRightRxHandle == NULL)
    {
        printf("DMA Config for I2S Read Failed!\n!");
    }

    I2S_transEnable(hI2s, TRUE);

    status = DMA_start(dmaRightRxHandle);
    if(status != CSL_SOK)
    {
        printf("I2S Dma Read Failed!!\n");
    }
    while(DMA_getStatus(dmaRightRxHandle));



    /** Close the operation                                        */
    result = I2S_close(hI2s);

I know that the DMAC controllers are out of reset since I (previously to calling this routine) make use of the DMA controller to read and write various external registers via the I2C peripheral built into the TMS320C5515.

If I put a break point at the end of this routine and examine the memory arrays I2SReadRightBuff and I2SReadLeftBuff, I fail to see that the DMA has transferred the 32 bit values from the Trasnmit arrays to the Read Buffers.......

It is from this observation that I conclude that the DMA events associated with I2S port 2 are not being received by DMA Controller 1.

Any help will be greatfuly received......

Hi,

I tried starting from CSL2.10 CSL_I2S_DMAExample_out project. I modified to use I2S2 port and DMA channel 4,5,6, and 7. All other are untouched.

Also it's I2S master on DSP side. It worked ok. I think this is worth to try it for you to get a starting point.

Regards,

Hyun

Hello Hyun,

       thanks for the quick reply.

If you look at the code that I included, you will see that it is almost a carbon copy of the CSL example that you state.

Two other facts make it problematic to run the code as is:

(1) the CSL example sets the PPMODE to mode 6 while I require it to be mode 1.

(2) The I2S interface in my application is acting as a slave and I can NOT disable the external master from generating the clocks.

Can you see anything that looks remiss in the section of code that I posted?

Best regards,

                         David

Hi,

In addition to previous try, I updated #define CSL_I2S_DMA_BUF_LEN (512) from (1).

And dmaConfig.dataLen      = 4 * CSL_I2S_DMA_BUF_LEN; from 4. This configuration also worked.

In your case CSL_I2S_DMA_BUF_LEN = 128 right?

Only concern is loopback mode with slave mode. This is not checked.

Regards,

Hyun