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TMS320C6746: SPI-NOR Flash Device Support

MrkH
Prodigy 70 points
Part Number: TMS320C6746
Other Parts Discussed in Thread: OMAP-L138

Hello,

I am using SPI0 for SPI-NOR flash boot. I strapped BOOT to "0000 1010" per spratt2f.pdf.

Questions:

  1. Is Macronix "mx25l3206em2i-12g" SPI-NOR supported from HW and tool (AISgen) perspective? Can you provide a list of supported devices for reference.
  2. Please advise on any limitations with SPI-NOR boot, and flash device that I should be aware of.

Thanks,

Mark

  • 0
    TI__Mastermind 30140 points

    Hi Mark,

    1) I think the mx25l3206em2i-12g should work. I'm not sure if we have a list of supported devices, but C6748/6/2 and OMAP-L138 are all members of the same family, so you may gain confidence by reusing any SPI flash that was proven on an EVM or E2E post for these devices.

    Bootloader requirements

    Data must be placed at address 0 of the memory device

    Chip Select 0 must be used (SPI0_SCS[0] or SPI1_SCS[0])

    SPI flash must use 24-bit addressing. The read command opcode for the SPI flash device must be 0x03
    - mx25l3206em2i-12g follows this (Figure 15 in its datasheet)

    Read Data Bytes (READ) Sequence (Command 03) must consist of the 8-bit command followed immediately by 24-bit address followed immediately by data. There can be no clock cycle delays between these phases.
    - mx25l3206em2i-12g follows this (Figure 15 in its datasheet)

    In the SPI-boot modes, the received data is sampled at the rising edge of the clock and the data to be transmitted on the falling edge of the clock (MODE 0 or MODE 3)
    - mx25l3206em2i-12g also supports MODE 0 / MODE 3

    SPI master modes supports sequential read mode. This option speeds up the boot process by
    allowing the bootloader to repeatedly read sequential data words from a slave memory device after
    sending only one read request and address to the device. The AIS GUI has an option to use Sequential Read.
    - mx25l3206em2i-12g supports Read at Higher Speed (FAST_READ) Sequence (Command 0B)

    AIS can configure the SPI CLK speed up to 33MHz (I think even faster rates are possible, below wiki shows 45.6 MHz). The default SPI Master rate is 833 kHz (based on 25MHz input clock) or 800kHz (based on 24MHz input clock)
    - mx25l3206em2i-12g supports 86MHz serial clock

    SPI0 and SPI1 are both members of power group A, which may be either 1.8V or 3.3V. Ensure you choose a SPI flash that operates at your desired IO voltage.

    Any SPI flash that meets these requirements can be used.

    2) Limitations

    I dont believe the bootloader can utilize Dual Output mode where SI and SO pins become SIO0 and SIO1 pins for data output.
    There are faster methods of booting like MMC

    Read these E2E posts and wiki pages to understand boot copy speed/ efficiency and deltas between L138 and C6748/6/2
    https://e2e.ti.com/support/dsp/omap_applications_processors/f/42/t/566020 
    http://processors.wiki.ti.com/index.php/OMAP-L138_Boot_Benchmarks 
    http://processors.wiki.ti.com/index.php/Serial_Boot_and_Flash_Loading_Utility_for_OMAP-L138 

    Hope this helps,
    Mark