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Data transfer from EMIF to DARAM via DMA

Dear community,

Currently I use VC5505 DSP und have following application question: I try to transfer a data from EMIF to DARAM via DMA. During this transfer an order of the words in the double word massage will be change. It means, if I have data in external SRAM: 1,2,3,4,5,6… After transmission DMA place in DARAM corresponding data sequence 2,1,4,3,6,5... Is this procedure correct? How can I get the right order of data in DARAM?

Thank you for an answer,

 

Olek

  • Hi,

    It seems like the issue is due to DMA word swap. On VC5505 DSP, DMA swaps the words in the data buffer during the data transfer. If you are writing the data using DMA and read it back using DMA then you see no issues. But if you write data using DMA and read it without using DMA or vice versa you will observe the word swap. Please refer to the silicon errata for your DSP version.

    Pratap.

  • Hi,

     

    Also the swap ordering is 4,3,2,1,8.7,6,5....

    Regards,

    Hyun

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    Normal 0 21 false false false DE X-NONE X-NONE MicrosoftInternetExplorer4

    Hi Pratap,


    Thank you for your briefing. One thing I don’t yet understand. I observe the word swap only if I write data from EMIF (SARAM) to DARAM. During data transfer inside one memory type (from SARAM to SARAM or from DARAM to DARAM) I didn’t see this effect. Is it also correct?


    Olek


    PS: Oh..., I found the answer in the silicon errata.

  • Hi,

     

    DMA swap only two words 2,1,4,3.... The nambers are in Int16 format.

    Regards,

    Olek

  • Olek,

    Since you said that you are using VC5505, I need to explain the endianness based on the VC5505. Please keep in mind that the C5505 has different peripheral endianness.

    DMA has not intelligent on data endianess, so DMA does not swap data order. It is depending on the peripheral that uses the DMA. In the VC5505, the RAM (DARAM and SARAM) is big endian but EMIF is little endian. Whenever DMA transfer data between two modules that have different endianness, it results in word or byte swap. When you transfer data EMIF to EMIF, you won't see this issue.

    Please carefully review the device errata in the apspect of endianness.

     

    FYI, in the C5505, EMIF is big endian.

    Best Regards,

    Peter Chung

     

  • Hi Peter,

    Thanks for you explanation.

    Best Regards,

     

    Olek

  • Olek,

    I am glad that I can help.

    Best Regards,

    Peter Chung