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RTOS/AM3358: UART clock gating

Part Number: AM3358

Tool/software: TI-RTOS

Hello!

I have a question regarding clock gating.

According to reference manual the iface and functional clocks of the hw module would be

turned off when MODULEMODE_DISABLED = 0x0 is written to appropriate CLKCTRL register.

The UARTs 1 - 5 have the same clock domain,  but PRCM exports separate CLKCTRL registers for each of them

i.e.

CM_PER_UART1_CLKCTRL

...

CM_PER_UART5_CLKCTRL

So this confuses a little. If UARTs1-5 have the same clock domain, that means they could be gated

only all together (right?) What is the meaning then of this UART1-5_CLKCTRL registers. What will

happen if I have written MODULEMODE_DISABLE only to UART4_CLKCTRL for example?