Linux/am3352: GPMC_CS[6:4]

LIANG WANG102707

Part Number: AM3352

Tool/software: Linux

Hi :

I am strange that in the lastest TRM ,

5-0 BASEADDRESS R/W 0h Chip-select base address.
CSi base address where i = 0 to 3 (16 Mbytes minimum granularity).
Bits 5 to 0 correspond to A29, A28, A27, A26, A25, and A24.

it said that CSi base where i=0 to 3 ?

Is that mean gpmc_cs4 gpmc_cs5 gpmc_cs6 can not be used as chip select pin and no memory space for it ?

Or it is a mistake in TRM

Best regards

wangl

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

This is a typo in the TRM.

0 LIANG WANG102707 over 8 years ago in reply to Biser Gatchev-XID

Expert 1415 points

Hello Biser:
I am using gpmc cs6 , is it something different to gpmc_cs0 ?I can get the cs0 falling edge on the scope ,
however,I can not get the falling edge of cs6 on the scope.
Strange, I use the following set of gpmc cs6 in the dts. using the same code for cs0 and cs6

I am using the 8bit nonmultiplex mode gpmc
0x78 (PIN_OUTPUT | MUX_MODE2) /* gpmc_ben1.gpmc_csn6 */

0 Biser Gatchev-XID over 8 years ago in reply to LIANG WANG102707

TI__Guru**** 393215 points

LIANG WANG102707 said:
using the same code for cs0 and cs6

You must assign different base addresses for the two CS regions. They cannot overlap.

0 LIANG WANG102707 over 8 years ago in reply to Biser Gatchev-XID

Expert 1415 points

Hi Biser:
I have found out that the problem come from dtb ,I have fix it .
The gpmc cs6 region work fine now,but the kernel report a lot the following ：
edma 49000000.edma: dma_ccerr_handler: Error interrupt without error event!
Why so much dma_ccerr interrupt?
Best regards
wangl

0 Biser Gatchev-XID over 8 years ago in reply to LIANG WANG102707

TI__Guru**** 393215 points

This is an entirely different question from your original post. Please mark this thread as resolved and open a new thread for it.

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Linux/am3352: GPMC_CS[6:4]