Linux/AM5718: Pinmux of McSPI D0 and D1

vamshi krishna gajjela

Part Number: AM5718

Tool/software: Linux

Dear Team,

I am working on AM571x based IDK

I see from the u-boot pin-mux is configured using , do_set_mux32((*ctrl)->control_padconf_core_base, pconf, pconf_sz);

It is using following settings defined in array core_padconf_array_0essential_am571x_idk

In the pin-mux array D0 & D1 are configured as input pull-up in pad configuration

    {SPI2_SCLK, (M0 | PIN_INPUT_PULLDOWN)},   /* spi2_sclk.spi2_sclk */
   {SPI2_D1, (M0 | PIN_INPUT_SLEW)},   /* spi2_d1.spi2_d1 */
   {SPI2_D0, (M0 | PIN_INPUT_SLEW)},   /* spi2_d0.spi2_d0 */
   {SPI2_CS0, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)},   /* spi2_cs0.spi2_cs0 */

In the kernel spi-omap2-mcspi.c in the channel configuration they are congigured with D0 as input and D1 as output or vice versa.

if (mcspi->pin_dir == MCSPI_PINDIR_D0_IN_D1_OUT) {
       l &= ~OMAP2_MCSPI_CHCONF_IS;
       l &= ~OMAP2_MCSPI_CHCONF_DPE1;
       l |= OMAP2_MCSPI_CHCONF_DPE0;
   } else {
       l |= OMAP2_MCSPI_CHCONF_IS;
       l |= OMAP2_MCSPI_CHCONF_DPE1;
       l &= ~OMAP2_MCSPI_CHCONF_DPE0;
   }

Following are my questions:

1) Why in U-boot D1 is not configured as output, or is it configured elsewhere in u-boot ?

2) By programming the channel configuration register of SPI peripheral will it effect the pad configuration register?

Thanks,

Vamshi

over 8 years ago

0 Biser Gatchev-XID over 8 years ago

TI__Guru**** 393215 points

Hi,

1. The entry "PIN_INPUT_SLEW" does not configure the pin as an input. It only enables the input receiver. The output transmitter is always enabled.
2. No, these are two separate configs. SPI channel config is inside the McSPI subsystem, Pad config is for the pad I/O cell.

0 vamshi krishna gajjela over 8 years ago in reply to Biser Gatchev-XID

Expert 1695 points

Hi Biser,

My point is, in the pad configuration we can say either a pin is input or output, In case of SPI we are configuring the pad registers to select SPI and as input enable.

{SPI2_D1, (M0 | PIN_INPUT_SLEW)}, /* spi2_d1.spi2_d1 */
{SPI2_D0, (M0 | PIN_INPUT_SLEW)}, /* spi2_d0.spi2_d0 */

Here is the definition of macro, PIN_INPUT_SLEW
#define PIN_INPUT_SLEW (INPUT_EN | SLEWCONTROL).

1) If received mode is disable ==> output is enabled ??
2) I am looking where the SPI_D1 pad register is configured as output ??

Thanks,
Vamshi G.

0 Biser Gatchev-XID over 8 years ago in reply to vamshi krishna gajjela

TI__Guru**** 393215 points

1. At pad configuration level output is always enabled, regardless of receive mode.
2. These are IS, DPE1, and DPE0 bits in MCSPI_CHxCONF register.

0 vamshi krishna gajjela over 8 years ago in reply to Biser Gatchev-XID

Expert 1695 points

1. At pad configuration level output is always enabled, regardless of receive mode.

<The above statement applies to GPIOs also? usually it says by default all pins are configured as input so that we do not drive accidentally>

2. I understood this point from my first post of this thread. Thanks you

0 Biser Gatchev-XID over 8 years ago in reply to vamshi krishna gajjela

TI__Guru**** 393215 points

vamshi krishna gajjela said:
<The above statement applies to GPIOs also? usually it says by default all pins are configured as input so that we do not drive accidentally>

This is true for the GPIO direction, not at pad level.

0 vamshi krishna gajjela over 8 years ago in reply to Biser Gatchev-XID

Expert 1695 points

Hi Biser,

I have just realized that my question was so basic. Mux is to select the function not to configure the function.

Thanks for your inputs.

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Linux/AM5718: Pinmux of McSPI D0 and D1