Other Parts Discussed in Thread: SYSBIOS, AM5718
Tool/software: TI-RTOS
Hi
I have a C66 program on my IDK 5718.
With SYSBIOS I have configured a dmtimer to periodically (every 100us) run my TimerFunction().
At the beginning of the TimerFunction I set a GPIO pin.
At the end of the TimerFunction I clear this GPIO pin.
The workload of the TimerFuntion is less than one micro second.
When I measure the GPIO pin with an external oscilloscope I can see that the ISR has a large jitter.
Some times the time between two consucutive TimerFunctions is 105us. So the ISR latency can be up to 5us.
According to the SYSBIOS benchmark results (<BOPS_INSTALL_DIR>\packages\ti\sysbios\benchmarks\doc-files\benchmarks.html)
the maximum interrupt latency for the C66 is 268 cycles. When running the C66 at 700MHz this is about 0.38us.
The build profile is set to "Release" and the BIOS Lib Type is set to "custom"
One or two low priority tasks are running in the background. L2 cache is enabled (128kB) and the active part of the
program should easily fit into this cache size.
As running from L2 cache is 2-3 times slower than from L1 RAM/Cache I would except a maximum latency of about 1us, but not 5us.
My program does not disable / restore interrupts outside of the TimerFunction.
How can I improve the latency / jitter of my TimerFunction?
Regards,
Markus
