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TDA3XEVM: Radar SDK: How to enable or disable optimization for single file

Allen35065
Expert 4485 points

Part Number: TDA3XEVM

Hi expert,

Ctm want to build their own program based on C:\PROCESSOR_SDK_RADAR_03_00_00_00\vision_sdk\apps\src\rtos\radar\src\usecases\radar_capture_fft_null. 

Because they need O3 optimization on project, so we modified C:\PROCESSOR_SDK_RADAR_03_00_00_00\vision_sdk\build\rtos\makerules\rules_66.mk line105~line113 to 

# CFLAGS based on profile selected
ifeq ($(PROFILE_$(CORE)), debug)
CFLAGS_INTERNAL += --symdebug:dwarf -O3 --keep_asm -D_DEFINE_C66XDSP_=1
CFLAGS_XDCINTERNAL = -Dxdc_target_name__=C66 -Dxdc_bld__profile_debug -D_DEBUG_=1
ifndef MODULE_NAME
CFLAGS_XDCINTERNAL += -Dxdc_cfg__header__=$(CONFIGURO_DIR)/package/cfg/$(XDC_HFILE_NAME)_pe66.h
endif
LNKFLAGS_INTERNAL_PROFILE =
endif

But ctm want to disable optimization for a single file, for example chains_radarcapturefftnull.c, then how to set make rules for this request? 

Thank you.

Regards,

Allen

  • 0
    TI__Mastermind 42515 points
    Hi Allen,

    I have forwarded your question to an expert for comment.

    Regards,
    Yordan
  • 0 in reply to Yordan Kamenov
    TI__Mastermind 30245 points

    Hi Allen,

    For this specific case chains_radarcapturefftnull.c is build for IPU1_0 and not DSP. The optimization level mentioned in the rules_66.mk will not impact this file.

    Thanks and Regards,

    Piyali

  • 0 in reply to Piyali Goswami
    TI__Expert 4485 points

    Hi Piyali,

    Sorry i didn't notice that. I just mean if we have a file for DSP in this directory then how to enable or disable optimization seperately.

    Thanks.

    Allen

  • 0 in reply to Allen35065
    TI__Mastermind 30245 points
    Hi Allen,

    I had a quick look at the build system and it seems like setting the optimization level for a particular file will require adding a separate variable which captures all the files which are buillt with a different compile time flag versus other files. Using this separate variable we should build these files which use the different compile flags.

    I would need to try this at my end before suggesting the exact steps. Could you please let me know the need date for this?

    Thanks and Regards,
    Piyali
  • 0 in reply to Piyali Goswami
    TI__Expert 4485 points
    Hi Piyali,

    Because customer need to optimize their algorithm code but not driver code where they found some problem when using O3 option, could you please help let me know the steps by e/o next week (01/06/18)?
    Thank you very much.

    Regards,
    Allen
  • 0 in reply to Allen35065
    TI__Mastermind 30245 points

    Hi Allen,

    The changes required for a given file to have a different optimization level than rest of the files is as given below:

    In the file vision_sdk\build\rtos\makerules\rules_66.mk add the portions in bold:

    # Object file creation
    # The first $(CC) generates the dependency make files for each of the objects
    # The second $(CC) compiles the source to generate object
    $(OBJ_PATHS): $(OBJDIR)/%.$(OBJEXT): %.c
    $(ECHO) \# Compiling $(PLATFORM):$(CORE):$(PROFILE_$(CORE)):$(APP_NAME)$(MODULE_NAME): $<
    $(CC) -ppd=$(DEPFILE).P $(_CFLAGS) $(INCLUDES) $(CFLAGS_DIROPTS) $(CFLAGS_$(basename $(notdir $<))) -fc $<
    $(CC) $(_CFLAGS) $(INCLUDES) $(CFLAGS_DIROPTS) $(CFLAGS_$(basename $(notdir $<))) -fc $<

    As an example, lets say I am building the entire executable with release mode and I want a file like vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radarfft2\radarFft2.c to be build without any optimization.

    So in the file vision_sdk\apps\src\rtos\radar\src\alg_plugins\alg_fxns\radarfft2\SRC_FILES.MK add the line:

    CFLAGS_radarFft2 = --opt_level=0

    The format is CFLAGS_<filename_without_extension> = <Your desired file specific options>

    So the file gets this option and you should see this change:

    In the build generated file: vision_sdk\binaries\apps\tda3xx_alps_bios_radar\obj\app_alg_plugins\tda3xx-evm\66\release\radarFft2.se66

    (Release Default)

    ;* Optimizing for : Speed 1st, size 2nd *
    ;* Based on options: -o3, -ms0 *

    to 

    (Option Specified)

    ;* Optimizing for : Compile time, Ease of Development *
    ;* Based on options: -o0, -ms0 *

    Please try this at your end and let me know if this works for you.

    Also, it would be great if you could clarify which driver code is being executed on the DSP which does not work with the higher optimization level at the customer.

    Thanks and Regards,

    Piyali

  • 0 in reply to Piyali Goswami
    TI__Expert 4485 points
    Hi Piyali,

    It's solved. Thank you.

    Customer wrote their own EDMA driver code and use while loop to poll the complete flag register. The code is

    volatile unsigned int tmp;
    do
    {
    tmp = *(unsigned int *)(0xAABBCCDD);
    }while ((tmp&0x1) == 0)

    We found in CGT v7.4.23 if O3 is enabled the asm code for this loop is wrong, it will only read the register when code run into the loop in the first time then it's endless loop. If we change O3 to O0, the asm code is correct and loop runs well.

    Regards,
    Allen
  • 0 in reply to Allen35065
    TI__Expert 4935 points

    The read should also be volatile.

    Try below and check if it works in O3 optimization

    tmp = *(volatile unsigned int *)(0xAABBCCDD);

  • 0 in reply to Sivaraj R3681
    TI__Mastermind 30245 points

    Hi Allen,

    Glad to hear that this is working at your end. I agree with Sivaraj on typecasting the read to a volatile unsigned read.

    Thanks and Regards,

    Piyali