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DRA756: HW Design related queries

Senthil kumar Irulappan
Prodigy 185 points

Part Number: DRA756

1. Can the PMIC power I/P (all smps i/p) be 5V instead of 3.3V ? In EVM design the PMIC smps i/p is powered by 3.3V.
    Do you foresee any issue with this approach ? Our voltage I/P is 5V instead of 12V like the J6 EVM, so wanted to know whether PMIC I/P can be 5V instead of 3.3V.
2. Sysboot signals are Multiplexed with VOUT3. Will the pull up/pull down resistors for boot configuration cause any issue in the VOUT I/F ? Or is it better to do it through external bus switch ?
3. CMOS Battery Backed RTC Implementation in DRA756 or PMIC - Is there any app note related to this? 
4. Can we configure any GPIOs as Interrupts in DRA756? or Is there any specific ones that alone can generate interrupt? 
5. Is there any Errata for DRA756 Rev B ? If so, Could you pls share it with us?
  • 0
    TI__Mastermind 42515 points
    Hi,

    I have forwarded your question to an expert for comment.

    Regards,
    Yordan
  • 0 in reply to Yordan Kamenov
    TI__Mastermind 25080 points
    Hi Senthil,

    1. The PMIC in the EVM requires exactly the voltages that you see on the schematic. You will need 3.3 volts for many peripherals in your project anyway, so a 3.3-V regulator will be needed.
    2. As long they are rated similarly to EVM's (10k) you will not need other circuitry
    3. You are free to use any external battery-backed RTC available. For example one of TI EVMs has MCP79410
    4. All GPIO pins can generate interrupts
    5. Looks like errata is not available on ti.com, you will have to ask it from your TI representative/distributor.

    Hope this will be of some help.

    Regards,
    Stan