Part Number: TMDSEVM572X
Hi,
I am doing the PRU programming as a bare metal to read from GPI and timer configuration to configure timer and want to use its ISR for some calculation.
But the timer was not able to configure and i debug the code to find the issue. i found below msg as shown in attachment.
******************************************************************************
PRU Linker PC v2.1.4
******************************************************************************
>> Linked Wed Dec 20 14:52:21 2017
OUTPUT FILE NAME: <button_led_0.out>
ENTRY POINT SYMBOL: "_c_int00_noinit_noargs_noexit" address: 00000000
MEMORY CONFIGURATION
name origin length used unused attr fill
---------------------- -------- --------- -------- -------- ---- --------
PAGE 0:
PRU_IMEM 00000000 00003000 00000168 00002e98 RWIX
PAGE 1:
PRU_DMEM_0_1 00000000 00002000 00000100 00001f00 RWIX
PRU_DMEM_1_0 00002000 00002000 00000000 00002000 RWIX
PAGE 2:
PRU_SHAREDMEM 00010000 00008000 00000000 00008000 RWIX
PRU_INTC 00020000 00001504 00001504 00000000 RWIX
PRU_CFG 00026000 00000120 00000044 000000dc RWIX
PRU_UART 00028000 00000038 00000000 00000038 RWIX
PRU_IEP 0002e000 0000031c 0000031c 00000000 RWIX
PRU_ECAP 00030000 00000060 00000000 00000060 RWIX
RSVD27 00032000 00000100 00000000 00000100 RWIX
RSVD21 00032400 00000100 00000000 00000100 RWIX
L3OCMC 40000000 00010000 00000000 00010000 RWIX
MCASP3_DMA 46000000 00000100 00000000 00000100 RWIX
RSVD11 48022000 00000088 00000000 00000088 RWIX
RSVD12 48024000 00000088 00000000 00000088 RWIX
RSVD2 4802a000 000000d8 00000000 000000d8 RWIX
RSVD6 48030000 000001a4 00000000 000001a4 RWIX
RSVD1 48040000 0000005c 00000000 0000005c RWIX
I2C3 48060000 00000300 00000000 00000300 RWIX
RSVD22 480c8000 00000140 00000000 00000140 RWIX
RSVD23 480ca000 00000880 00000000 00000880 RWIX
RSVD17 4819c000 000000d8 00000000 000000d8 RWIX
RSVD16 481a0000 000001a4 00000000 000001a4 RWIX
RSVD14 481cc000 000001e8 00000000 000001e8 RWIX
RSVD15 481d0000 000001e8 00000000 000001e8 RWIX
RSVD18 48300000 000002c4 00000000 000002c4 RWIX
RSVD19 48302000 000002c4 00000000 000002c4 RWIX
RSVD20 48304000 000002c4 00000000 000002c4 RWIX
RSVD13 48310000 00000100 00000000 00000100 RWIX
RSVD10 48318000 00000100 00000000 00000100 RWIX
RSVD29 49000000 00001098 00000000 00001098 RWIX
RSVD9 4a100000 0000128c 00000000 0000128c RWIX
DDR 80000000 00000100 00000000 00000100 RWIX
SECTION ALLOCATION MAP
output attributes/
section page origin length input sections
-------- ---- ---------- ---------- ----------------
.text:_c_int00*
* 0 00000000 00000014
00000000 00000014 rtspruv3_le.lib : boot_special.obj (.text:_c_int00_noinit_noargs_noexit)
.text 0 00000014 00000154
00000014 000000f4 button_led_0.obj (.text:configIep)
00000108 00000048 button_led_0.obj (.text:main)
00000150 00000008 rtspruv3_le.lib : exit.obj (.text:abort)
00000158 00000008 button_led_0.obj (.text:configIntc)
00000160 00000008 rtspruv3_le.lib : exit.obj (.text:loader_exit)
.stack 1 00000000 00000100 UNINITIALIZED
00000000 00000004 rtspruv3_le.lib : boot.obj (.stack)
00000004 000000fc --HOLE--
.cinit 1 00000000 00000000 UNINITIALIZED
.creg.PRU_INTC.noload.near
* 2 00020000 00000000 NOLOAD SECTION
.creg.PRU_INTC.near
* 2 00020000 00000000 UNINITIALIZED
.creg.PRU_INTC.noload.far
* 2 00020000 00001504 NOLOAD SECTION
00020000 00001504 button_led_0.obj (.creg.PRU_INTC.noload.far)
.creg.PRU_INTC.far
* 2 00021504 00000000 UNINITIALIZED
.creg.PRU_CFG.noload.near
* 2 00026000 00000044 NOLOAD SECTION
00026000 00000044 button_led_0.obj (.creg.PRU_CFG.noload.near)
.creg.PRU_CFG.near
* 2 00026044 00000000 UNINITIALIZED
.creg.PRU_CFG.noload.far
* 2 00026044 00000000 NOLOAD SECTION
.creg.PRU_CFG.far
* 2 00026044 00000000 UNINITIALIZED
.creg.PRU_IEP.noload.near
* 2 0002e000 00000000 NOLOAD SECTION
.creg.PRU_IEP.near
* 2 0002e000 00000000 UNINITIALIZED
.creg.PRU_IEP.noload.far
* 2 0002e000 0000031c NOLOAD SECTION
0002e000 0000031c button_led_0.obj (.creg.PRU_IEP.noload.far)
.creg.PRU_IEP.far
* 2 0002e31c 00000000 UNINITIALIZED
SEGMENT ATTRIBUTES
id tag seg value
-- --- --- -----
0 PHA_PAGE 1 1
GLOBAL SYMBOLS: SORTED ALPHABETICALLY BY Name
page address name
---- ------- ----
0 00000160 C$$EXIT
2 00026000 CT_CFG
2 0002e000 CT_IEP
2 00020000 CT_INTC
abs 80000000 __PRU_CREG_BASE_DDR
abs 48060000 __PRU_CREG_BASE_I2C3
abs 40000000 __PRU_CREG_BASE_L3OCMC
abs 46000000 __PRU_CREG_BASE_MCASP3_DMA
abs 00026000 __PRU_CREG_BASE_PRU_CFG
abs 00000000 __PRU_CREG_BASE_PRU_DMEM_0_1
abs 00002000 __PRU_CREG_BASE_PRU_DMEM_1_0
abs 00030000 __PRU_CREG_BASE_PRU_ECAP
abs 0002e000 __PRU_CREG_BASE_PRU_IEP
abs 00020000 __PRU_CREG_BASE_PRU_INTC
abs 00010000 __PRU_CREG_BASE_PRU_SHAREDMEM
abs 00028000 __PRU_CREG_BASE_PRU_UART
abs 48040000 __PRU_CREG_BASE_RSVD1
abs 48318000 __PRU_CREG_BASE_RSVD10
abs 48022000 __PRU_CREG_BASE_RSVD11
abs 48024000 __PRU_CREG_BASE_RSVD12
abs 48310000 __PRU_CREG_BASE_RSVD13
abs 481cc000 __PRU_CREG_BASE_RSVD14
abs 481d0000 __PRU_CREG_BASE_RSVD15
abs 481a0000 __PRU_CREG_BASE_RSVD16
abs 4819c000 __PRU_CREG_BASE_RSVD17
abs 48300000 __PRU_CREG_BASE_RSVD18
abs 48302000 __PRU_CREG_BASE_RSVD19
abs 4802a000 __PRU_CREG_BASE_RSVD2
abs 48304000 __PRU_CREG_BASE_RSVD20
abs 00032400 __PRU_CREG_BASE_RSVD21
abs 480c8000 __PRU_CREG_BASE_RSVD22
abs 480ca000 __PRU_CREG_BASE_RSVD23
abs 00032000 __PRU_CREG_BASE_RSVD27
abs 49000000 __PRU_CREG_BASE_RSVD29
abs 48030000 __PRU_CREG_BASE_RSVD6
abs 4a100000 __PRU_CREG_BASE_RSVD9
abs 0000001f __PRU_CREG_DDR
abs 00000005 __PRU_CREG_I2C3
abs 0000001e __PRU_CREG_L3OCMC
abs 00000008 __PRU_CREG_MCASP3_DMA
abs 00000004 __PRU_CREG_PRU_CFG
abs 00000018 __PRU_CREG_PRU_DMEM_0_1
abs 00000019 __PRU_CREG_PRU_DMEM_1_0
abs 00000003 __PRU_CREG_PRU_ECAP
abs 0000001a __PRU_CREG_PRU_IEP
abs 00000000 __PRU_CREG_PRU_INTC
abs 0000001c __PRU_CREG_PRU_SHAREDMEM
abs 00000007 __PRU_CREG_PRU_UART
abs 00000001 __PRU_CREG_RSVD1
abs 0000000a __PRU_CREG_RSVD10
abs 0000000b __PRU_CREG_RSVD11
abs 0000000c __PRU_CREG_RSVD12
abs 0000000d __PRU_CREG_RSVD13
abs 0000000e __PRU_CREG_RSVD14
abs 0000000f __PRU_CREG_RSVD15
abs 00000010 __PRU_CREG_RSVD16
abs 00000011 __PRU_CREG_RSVD17
abs 00000012 __PRU_CREG_RSVD18
abs 00000013 __PRU_CREG_RSVD19
abs 00000002 __PRU_CREG_RSVD2
abs 00000014 __PRU_CREG_RSVD20
abs 00000015 __PRU_CREG_RSVD21
abs 00000016 __PRU_CREG_RSVD22
abs 00000017 __PRU_CREG_RSVD23
abs 0000001b __PRU_CREG_RSVD27
abs 0000001d __PRU_CREG_RSVD29
abs 00000006 __PRU_CREG_RSVD6
abs 00000009 __PRU_CREG_RSVD9
1 00000100 __TI_STACK_END
abs 00000100 __TI_STACK_SIZE
abs ffffffff __binit__
abs ffffffff __c_args__
0 00000000 _c_int00_noinit_noargs_noexit
1 00000000 _stack
0 00000150 abort
abs ffffffff binit
0 00000014 configIep
0 00000158 configIntc
0 00000108 main
GLOBAL SYMBOLS: SORTED BY Symbol Address
page address name
---- ------- ----
0 00000000 _c_int00_noinit_noargs_noexit
0 00000014 configIep
0 00000108 main
0 00000150 abort
0 00000158 configIntc
0 00000160 C$$EXIT
1 00000000 _stack
1 00000100 __TI_STACK_END
2 00020000 CT_INTC
2 00026000 CT_CFG
2 0002e000 CT_IEP
abs 00000000 __PRU_CREG_BASE_PRU_DMEM_0_1
abs 00000000 __PRU_CREG_PRU_INTC
abs 00000001 __PRU_CREG_RSVD1
abs 00000002 __PRU_CREG_RSVD2
abs 00000003 __PRU_CREG_PRU_ECAP
abs 00000004 __PRU_CREG_PRU_CFG
abs 00000005 __PRU_CREG_I2C3
abs 00000006 __PRU_CREG_RSVD6
abs 00000007 __PRU_CREG_PRU_UART
abs 00000008 __PRU_CREG_MCASP3_DMA
abs 00000009 __PRU_CREG_RSVD9
abs 0000000a __PRU_CREG_RSVD10
abs 0000000b __PRU_CREG_RSVD11
abs 0000000c __PRU_CREG_RSVD12
abs 0000000d __PRU_CREG_RSVD13
abs 0000000e __PRU_CREG_RSVD14
abs 0000000f __PRU_CREG_RSVD15
abs 00000010 __PRU_CREG_RSVD16
abs 00000011 __PRU_CREG_RSVD17
abs 00000012 __PRU_CREG_RSVD18
abs 00000013 __PRU_CREG_RSVD19
abs 00000014 __PRU_CREG_RSVD20
abs 00000015 __PRU_CREG_RSVD21
abs 00000016 __PRU_CREG_RSVD22
abs 00000017 __PRU_CREG_RSVD23
abs 00000018 __PRU_CREG_PRU_DMEM_0_1
abs 00000019 __PRU_CREG_PRU_DMEM_1_0
abs 0000001a __PRU_CREG_PRU_IEP
abs 0000001b __PRU_CREG_RSVD27
abs 0000001c __PRU_CREG_PRU_SHAREDMEM
abs 0000001d __PRU_CREG_RSVD29
abs 0000001e __PRU_CREG_L3OCMC
abs 0000001f __PRU_CREG_DDR
abs 00000100 __TI_STACK_SIZE
abs 00002000 __PRU_CREG_BASE_PRU_DMEM_1_0
abs 00010000 __PRU_CREG_BASE_PRU_SHAREDMEM
abs 00020000 __PRU_CREG_BASE_PRU_INTC
abs 00026000 __PRU_CREG_BASE_PRU_CFG
abs 00028000 __PRU_CREG_BASE_PRU_UART
abs 0002e000 __PRU_CREG_BASE_PRU_IEP
abs 00030000 __PRU_CREG_BASE_PRU_ECAP
abs 00032000 __PRU_CREG_BASE_RSVD27
abs 00032400 __PRU_CREG_BASE_RSVD21
abs 40000000 __PRU_CREG_BASE_L3OCMC
abs 46000000 __PRU_CREG_BASE_MCASP3_DMA
abs 48022000 __PRU_CREG_BASE_RSVD11
abs 48024000 __PRU_CREG_BASE_RSVD12
abs 4802a000 __PRU_CREG_BASE_RSVD2
abs 48030000 __PRU_CREG_BASE_RSVD6
abs 48040000 __PRU_CREG_BASE_RSVD1
abs 48060000 __PRU_CREG_BASE_I2C3
abs 480c8000 __PRU_CREG_BASE_RSVD22
abs 480ca000 __PRU_CREG_BASE_RSVD23
abs 4819c000 __PRU_CREG_BASE_RSVD17
abs 481a0000 __PRU_CREG_BASE_RSVD16
abs 481cc000 __PRU_CREG_BASE_RSVD14
abs 481d0000 __PRU_CREG_BASE_RSVD15
abs 48300000 __PRU_CREG_BASE_RSVD18
abs 48302000 __PRU_CREG_BASE_RSVD19
abs 48304000 __PRU_CREG_BASE_RSVD20
abs 48310000 __PRU_CREG_BASE_RSVD13
abs 48318000 __PRU_CREG_BASE_RSVD10
abs 49000000 __PRU_CREG_BASE_RSVD29
abs 4a100000 __PRU_CREG_BASE_RSVD9
abs 80000000 __PRU_CREG_BASE_DDR
abs ffffffff __binit__
abs ffffffff __c_args__
abs ffffffff binit
[79 symbols]
Why this massages are coming?.I have attached map file and .C file for you reference.
while ((CT_INTC.SECR0 & (1 << 7)) == 0); this condition is always true. so next instruction never execute.
Regards,
Anjana Pathak
