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Linux/TMS320DM8148: general question about nand ecc errors

ranchu
Guru 20755 points

Part Number: TMS320DM8148

Tool/software: Linux

Hello,

I have a general question about nand, and ecc errors.

In TI's wiki it is said:

Why is ECC required for NANDs?

Data stored in NANDs can get corrupted (randomly). There is an upper limit on the number of error per byte depending on the NAND process and the technology. SLC NANDs have less ECC requirements than MLC NANDs. The NAND datasheet gives the ECC requirement for the NAND device. For SLC NANDs, 1/4bits per 512 bytes are common currently. For MLC, devices with 4/8/16 bits per 512 bytes ECC requirements are in the market.  

So, I try to understand, Is it that the same page which has ecc error, will get fixed after we reprogram it again ? Or will it immediately give the same ecc error ?

Regards,

Ran

  • 0
    Guru 13660 points
    Hi Ranchu,

    ECC is to avoid bit-flips due to electrical interference. Since NAND memory is dense, it is prone to more electrical interference. Due to electrical interference, bit flips(1 become 0 and 0 become 1) happen. So we use ECC correction code which can be 1/4/8/16 bit depth commonly. SLC is less dense than MLC. So 1/4 bit ECC scheme is sufficient. For MLC, we need 4/8/16 bits per 512 bytes. ECC detection module will tell you where the ECC error occurred and depending on the ECC scheme, the NAND driver corrects the error. Hope this helps.