Other Parts Discussed in Thread: AMIC110
Hello,
I'd like to operate AM3352 with DDRless using StarterWare. Can Cortex-A8 use Cortex-M3's internal memories?
I confirmed the operation by a test program with CCS v7.3 and TI compiler. Cortex-A8 can read and write M3SHUMEM and M3SHDMEM correctly during running my application. CCS can't connect to Cortex-M3 because it's been held in reset. Although they're reserved in TRM, it seems that they can also be used for Cortex-A8 in AM3352.
AM335x.cmd has the following description.
#ifdef A8_CORE /* A8 memory map */
MEMORY
{
SRAM: o = 0x402F0400 l = 0x0000FC00 /* 64kB internal SRAM */
L3OCMC0: o = 0x40300000 l = 0x00010000 /* 64kB L3 OCMC SRAM */
M3SHUMEM: o = 0x44D00000 l = 0x00004000 /* 16kB M3 Shared Unified Code Space */
M3SHDMEM: o = 0x44D80000 l = 0x00002000 /* 8kB M3 Shared Data Memory */
DDR0: o = 0x80000000 l = 0x40000000 /* 1GB external DDR Bank 0 */
}
AMIC110 uses these areas for Cortex-A8.
Regards,
Kazu
