• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 239 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DM6437 Boot questions

ermanm
Prodigy 90 points


Hi,

We have a DM6437 device we are configuring in-system for SPI boot (24x8) in FASTMODE=0.  Our intention is to use the genAIS utility and pass in a configuration file which sets the PLLs and the DDR interfaces on the DM6437 to our target operating conditions.  The question we have is on when these new settings are programmed into the device during the boot sequence.  We have read through the spraag0d document, and it looks like the device will reprogram the PLLs/DDR IF as soon as the commands to do so are fetched from our boot device (i.e. prior to the loading of the application into DDR).  But we wanted to make sure there is not some interaction with the FASTMODE=0 configuration -- since it appears we will be overriding this boot mode within the first few fetches from our SPI boot device.  We also were thinking that FASTMODE will only affect the first few SPI fetches -- those to get to the commands to reconfigure the PLLs -- and that the gains in boot time by going to FASTMODE=1 would be neglible.

If we did not reconfigure the DDR interface for target operation in the boot sequence, it appears we would not be able to do so once we are running from the DDR memory (how would we initialize the device once we are running from it?).  Is this observation correct?

Any confirmation of our understanding of this process would be appreciated.

Thanks.

  • 0
    TI__Mastermind 41665 points

    ermanm said:
    We have read through the spraag0d document, and it looks like the device will reprogram the PLLs/DDR IF as soon as the commands to do so are fetched from our boot device (i.e. prior to the loading of the application into DDR).

    This is correct, the idea is that the configurations are done before the code/data is loaded out so that it can be loaded directly to the newly configured DDR memory space.

    ermanm said:
    But we wanted to make sure there is not some interaction with the FASTMODE=0 configuration -- since it appears we will be overriding this boot mode within the first few fetches from our SPI boot device.  We also were thinking that FASTMODE will only affect the first few SPI fetches -- those to get to the commands to reconfigure the PLLs -- and that the gains in boot time by going to FASTMODE=1 would be neglible.

    I don't believe there will be any interaction with FASTMODE and I agree that it will not make a large difference if your initial AIS file commands are to configure the PLLs (though a 'large' amount of time is relative at this level).

    ermanm said:
    If we did not reconfigure the DDR interface for target operation in the boot sequence, it appears we would not be able to do so once we are running from the DDR memory (how would we initialize the device once we are running from it?).  Is this observation correct?

    In general I believe you can reconfigure the DDR without losing the contents as long as your configuration process does not hold off a refresh cycle for too long, though you should not have to configure it since it should have been configured during the boot sequence to allow your code/data to exist within it, I would probably just avoid configuring it again.