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CCS/66ak2l06: ccs/66ak2l06

Part Number: 66AK2L06

Tool/software: Code Composer Studio

Our design is going to boot from NAND flash and I have set the bootmode resistors arrangement on the board to show this and the DEVSTAT register the value will be  0x0775 with endian = 1 (little endian).  Thus the device uses the ARM core pac 0 to be the primary boot device. 

Problem:

Using the EVM, once I have programmed the NAND boot memory, why does the CCS emulator (attached to the EVM) not allow the jtag connection?  We have to keep putting the EVM into a "no boot" mode and I am confused as to why this is necessary.  In our system we will not be able to do this, but still must be able to attach to the emulator as needed.

  • Hi Bryan,

    No boot or Sleep boot is typically added to the bootROM to allow users to connect to device for debugging in a clean state were no device or peripherals are initialized and the configuration register, clocks, PSC registers are all in reset on state.

    Best Regards,
    Yordan