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Terminator location for DM6437 DDR2 DQM signals

Hi to everybody,

I would like to ask a question about the document "Implementing DDR2 PCB Layout on the tms320dm643x DSP" (SPRAAL6A). On page 4, I can see that serial terminators for DQM signals should be placed close to DSP.  But on page 12, Note 1 says that serial terminators for DQ (DQM is included in this group) net class should be located close to DDR.

What should I follow?

Thanks in advance,

Nuba.

  • Page 4 is just a schematic.  Table 11 specifies the locations of the DQ terminators.  Follow Table 11.

    -Mike

  • Hello Mike,

    Yes I know that.

    But on the evaluation board, those resistors are placed close the DSP and on another documentation from texas: Implementing DDR2 PCB layout on the TMS320dm4xx DMSoc ,

    SPRAAC6B,  It says so at page 17.

    So I am not sure. Do you still think the same thing?

     

     

     

  • Follow the spec.   SPRAAL6A is the controlling spec for the DM643x, if there is a difference between that and the EVM, follow the spec.  EVMs are developed early and sometimes do not comply completely with the final specs.

    Frankly, the placement of the terminator on the DM lines does not matter much due to the spec limiting trace lengths.  The driving factor behind putting the terminator near the memory is the memory buffers are stronger.  The DM lines are never driven by the DDR, thus, the original thought was put the DM terminator near the DSP.  However, it is better to treat all the data lines, dm, and dqs the same, so the change was made to put the DM terminator near the DDR.

    -Mike