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The SPI0 clock outs signals at offset

Part Number: TMDSLCDK6748

The SPI0 clock outputs a 3.7Vpp signal of 25MHz frequency even at offset. 

I have posted the SPI0 CLK signal output (when CLK signal is provided) in one of the earlier posts. 

https://e2e.ti.com/support/dsp/tms320c6000_high_performance_dsps/f/115/p/653205/2400921#2400921