Tool/software: Linux
Hi all
I am attempting to enable spread spectrum clocking for the DISP PLL. I have successfully done so within u-boot, however my settings are being over written when the Kernel comes up and appears to reinit the PLL's.
Currently on 4.11.12 mainline kernel, with 2016.01 u-boot but in the processes of migrating to 2017.11 for updates to other areas.
The registers related to the SSC do not seem to be mentioned anywhere in the dpll drivers that I can find, so I am not sure where the "new" values are coming from.
Any one have some insight?