TMDSLCDK138: Interrupts from ARM are not working in CCS/Non-OS project

Hi,

I am using CCS v7.2 and PSDK RTOS 4.01 where I created a bare metal (Non-OS), CCS project and want to test ARM interrupts with a timer. The timer and the AINTC seem to work correctly because I can see the interrupts arrive at the AINTC by inspecting its SECRx registers, but the call back functions (ISRs) that I have registered never get called.

I guess that I am missing some ARM initialization, but I have no clue what that could be.

How can I get the ARM to call my ISRs?

Best regards,

Ad

The code is shown below:

#include <stdint.h>
#include <stdio.h>
#include <stddef.h>

#include <ti/board/board.h>
#include <csl_tmr.h>
#include <csl_tmrAux.h>
#include <arch/csl_arch.h>
#include "hw_types.h"

#include <dbg/dbg_init.h>

extern void CopyVectorTable(void);
static void callback_int_timerp0_12();
static void callback_int_timerp0_34();

static void callback_int_timerp0_12()
{
    printf("Interrupt P0 12\n");fflush(stdout);
}

static void callback_int_timerp0_34()
{
    printf("Interrupt P0 34\n");fflush(stdout);
}


/**
 * main.c
 */
int main(void)
{
    int             i;
    CSL_TmrContext  context;
    CSL_Status      status;
    CSL_TmrObj      tmrObj;
    CSL_TmrHandle   hTmr;
    CSL_TmrHwSetup  hwSetup;
    CSL_TmrEnamode  enaMode;
    uint32_t        countLo;

    OnTargetConnect();

    printf("Timer test with interrupt, begin\n");

    CopyVectorTable();

    // initialize board
    Board_initCfg   board_cfg;
    board_cfg = BOARD_INIT_MODULE_CLOCK |
        BOARD_INIT_PINMUX_CONFIG |
        BOARD_INIT_UART_STDIO;
    Board_init(board_cfg);

    // initialize AINTC
    Intc_Init();
    IntGlobalEnable();
    IntIRQEnable();
    IntFIQEnable();
    Intc_IntEnable(0);

    Intc_IntRegister(21, callback_int_timerp0_12);
    Intc_IntRegister(22, callback_int_timerp0_34);
    Intc_SystemEnable(21);
    Intc_SystemEnable(22);
    IntChannelSet(21, 31);
    IntChannelSet(22, 31);
    printf("Interrupt channel 21: %u, channel 22: %u\n",
           IntChannelGet(21),
           IntChannelGet(22));

    // initialize timers
    CSL_tmrInit(&context);

    // Open TIMER 0
    hTmr = CSL_tmrOpen(&tmrObj, 0, NULL, &status);

    // setup hardware
    hwSetup.tmrTimerPeriodLo        = 0x00B70000;
    hwSetup.tmrTimerPeriodHi        = 0x00000000;
    hwSetup.tmrTimerCounterLo       = 0;
    hwSetup.tmrTimerCounterHi       = 0;

    // the internal clock input is from PLLC0 and is 24 MHz
    hwSetup.tmrIpGateLo             = CSL_TMR_CLOCK_INP_NOGATE;
    hwSetup.tmrClksrcLo             = CSL_TMR_CLKSRC_INTERNAL;
    hwSetup.tmrPulseWidthLo         = CSL_TMR_PWID_ONECLK;
    hwSetup.tmrClockPulseLo         = CSL_TMR_CP_CLOCK;
    hwSetup.tmrInvInpLo             = CSL_TMR_INVINP_UNINVERTED;
    hwSetup.tmrInvOutpLo            = CSL_TMR_INVOUTP_UNINVERTED;

    hwSetup.tmrIpGateHi             = CSL_TMR_CLOCK_INP_NOGATE;
    hwSetup.tmrClksrcHi             = CSL_TMR_CLKSRC_INTERNAL;
    hwSetup.tmrPulseWidthHi         = CSL_TMR_PWID_ONECLK;
    hwSetup.tmrClockPulseHi         = CSL_TMR_CP_CLOCK;
    hwSetup.tmrInvInpHi             = CSL_TMR_INVINP_UNINVERTED;
    hwSetup.tmrInvOutpHi            = CSL_TMR_INVOUTP_UNINVERTED;

    hwSetup.tmrPreScalarCounterHi   = 0;
    // 2 x 32-bit not chained
    hwSetup.tmrTimerMode            = CSL_TMR_TIMMODE_DUAL_UNCHAINED;

    CSL_tmrHwSetup(hTmr, &hwSetup);

    // enable timer interrupts in the timer controller
    uint32_t reg = hTmr->regs->INTCTL_STAT;
    reg |= (CSL_TMR_INTCTL_STAT_CMP_INT_EN_LO_MASK |
            CSL_TMR_INTCTL_STAT_CMP_INT_EN_HI_MASK);
    hTmr->regs->INTCTL_STAT = reg;

    // start timer
    enaMode = CSL_TMR_ENAMODE_CONT;
    CSL_tmrHwControl(hTmr, CSL_TMR_CMD_START_TIMLO, &enaMode);
    CSL_tmrHwControl(hTmr, CSL_TMR_CMD_START_TIMHI, &enaMode);

    for(i = 0; i < 4; i++)
    {
        CSL_tmrGetHwStatus(hTmr, CSL_TMR_QUERY_COUNT_LO, &countLo);
        printf("First timer count low: %u \n", countLo);
        printf("Interrupt: 21: raw: %u, enabled: %u, 22: raw: %u, enabled: %u\n",
               IntSystemStatusRawGet(21),
               IntSystemStatusEnabledGet(21),
               IntSystemStatusRawGet(22),
               IntSystemStatusEnabledGet(22));
    }

    // Close the timer.
    CSL_tmrClose(hTmr);

    printf("Timer test with interrupt, end\n");

	return 0;
}

The following output is produced:

[ARM9_0] 	Target Connected.
	---------------------------------------------
	PSC Enable Complete.
	---------------------------------------------
	PLL0 init done for Core:300MHz, EMIFA:25MHz
	DDR initialization is in progress....
	PLL1 init done for DDR:150MHz
	VTP Ready timeout
	Using DDR2 settings
	DDR2 init for 150 MHz is done
	---------------------------------------------
	DSP Wake Complete.
	---------------------------------------------
Timer test with interrupt, begin
Interrupt channel 21: 31, channel 22: 31
First timer count low: 108 
Interrupt: 21: raw: 0, enabled: 0, 22: raw: 0, enabled: 0
First timer count low: 10490700 
Interrupt: 21: raw: 1, enabled: 1, 22: raw: 0, enabled: 0
First timer count low: 10336590 
Interrupt: 21: raw: 1, enabled: 1, 22: raw: 0, enabled: 0
First timer count low: 10214893 
Interrupt: 21: raw: 1, enabled: 1, 22: raw: 0, enabled: 0
Timer test with interrupt, end