I have tried to enable instruction and data cache on the ARM of the OMAPL138 but it keeps crashing on me when I run the code. I run the following assembly code during initialization of my system while I am in supervisor mode:
mov r0, #0
mrc p15, #0, r0, c1, c0, #0
orr r0, r0, #CP15_CTL_MMU_ENABLE
orr r0, r0, #CP15_CTL_ALIGN_FAULT_ENABLE
orr r0, r0, #CP15_CTL_INST_CACHE_ENABLE
orr r0, r0, #CP15_CTL_DATA_CACHE_ENABLE
mcr p15, #0, r0, c1, c0, #0
mov r0, r0
mov r0, r0
mov r0, r0
mov r0, r0
mov r0, r0
The "mrc" line works just fine and returns me a value into r0. Right after the write to the coprocessor at the "mcr" line it gives me the following error:
ARM9_0: Trouble Reading Memory Block at 0xc00633a8 on Page 0 of Length 0x5d: Error 0x00000008/-1066 Error during: Break Point, Cannot set/verify breakpoint at 0xC00633AC ARM9_0: Trouble Reading Memory Block at 0xc00633a8 on Page 0 of Length 0x5d: Error 0x00000008/-1066 Error during: Break Point, Cannot set/verify breakpoint at 0xC00633AC Does anyone know what I am doing wrong in this case?
