• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 99 subscribers
  • Views 702 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

TMS320C6657: proper GPIO pins to use for upper address bits of NOR flash?

Trevor Fox
Intellectual 550 points

Part Number: TMS320C6657

HI,

I have a custom board that uses the C6657 DSP. There is a parallel NOR flash connected to the EMIF bus. My flash has 27 address pins (2G x 16), but the DSP EMIF bus seems to only have 24 bits of native address pins available (EMIFA00 - EMIFA23). I wired the upper three flash address pins to the UARTRTS_GPIO23, UARTRXD1_GPIO24, UARTTXD1_GPIO25 I/O pins.

Unfortunately, I did not add any pull resistors to these GPIO pins, and one of them seems to be going high at boot time (need all three low), so the improper location is being read.

I need the upper three address pins to work: On the next board spin, I have two options. Add pull-down resistors to these GPIO lines, but keep the pin locations the same. Or, add pull-down resistors, AND change the upper three address lines to different GPIO pins on the DSP. Are there GPIO pins that are guaranteed to be low at boot time?

  • 0
    TI__Mastermind 42545 points
    Hi Trevor,
    There are two issues to highlight. First is the use of external pulling resistors. The internal pulling resistors are designed to hold an unconnected pin in a known state. If any connection or trace is present on the board we recommend the use of an external pulldown if a stable state is needed when the pin is not driven. Based on this there are no pins guaranteed to be be low at reset and you should plan on including external pull downs.
    Second, the GPIO state is not the default state on the shared pins. The pins you selected will be connected to the UART IP at the release of reset and will not become GPIOs until you program the pin control register. It would be best to select signals that are used as inputs by the IP that is active in the reset state and include the external pull down resistors. Examples would be the GPIOs shared with UARTCTS, UARTCTS1, UARTRXD, UARTRXD1, SPIDIN, TIMI0 and TIMI1.
    Regards, Bill
  • 0 in reply to Bill Taboada
    Intellectual 550 points

    Hello, Bill, thank you for the information and advice.

    This all makes sense. I will make sure to add pull-downs, and use inputs, such as you have mentioned above (UARTCTS, UARTCTS1, UARTRXD, UARTRXD1, SPIDIN, TIMI0 and TIMI1).

    thank you again.