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AM35xx clock support

Other Parts Discussed in Thread: AM3517

Hello.

I found that in AM3517 quick manual there is a mistypo.

Table 4-4. 32-kHz Input Clock Source Timing Requirements is written:

tR(32k) Rise transition time, sys_32k  max = 20 ns
tF(32k) Fall transition time, sys_32k  max = 20 ns

But in LogicPD schematic is used ASEK-32.768kHz which has 40ns.

How can it be or maybe it is not 20ns, but 200ns ?

Also, Table 4-2. 26Mhz sys_clk Input Clock Timing Requirements (continued) is written:

tt(xtalin) Transition time, max = 5 ns
               sys_xtalin
But in LogicPD schematic is used AP3S2-26.0Mhz which has 6ns.

Thank you.

  • Hello,

    The requirements described in your questions are not typo, so it is recommended to use the input clock source to meet the timing requirements.

  •  

    Well, then, can I use a 32768kHz oscillator with rise/fall time equal to 200ns ?

    Also a question. What signal amplitude from the clkout2 pin will be if I use 3.3V VDDSHV ?
    I want to connect it to two aic3106 codecs with 3.3V IOVDD.

  • Mugen said:

    Well, then, can I use a 32768kHz oscillator with rise/fall time equal to 200ns ?

    Do you mean 20 ns ? The rise/fall time requirement for sys_32k clock input is max 20 ns in the data manual. If you meant 20 ns, you could use it.

    Mugen said:

    Also a question. What signal amplitude from the clkout2 pin will be if I use 3.3V VDDSHV ?
    I want to connect it to two aic3106 codecs with 3.3V IOVDD.

    sys_clkout2 pin is powered by VDDSHV power supply , so the signal amplitude from sys_clkout2 is 3.3 V when VDDSHV is powered by 3.3 V power supply.

  • As I wrote before, ASEK-32768kHz which is used by LogicPD has a 40ns rise/fall, so
    If I use oscillator with 200ns rise/fall will the AM35xx works with it?

  • The answer is unknown. If 20ns max is requirement for properly work why LogicPD uses oscillator with 40ns rise/fall? It's out of requirement.