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Linux: Capture+Display through HDCOMP out in DM388

Other Parts Discussed in Thread: TVP7002, DM388

Hi TI Experts,

I'm in customized DM388 platform.

My simple usecase is capture + Display (S-video) output using HDDAC.

So my usecase

    /*Initialize Capture Link params*/
    CaptureLink_CreateParams_Init(&capturePrm);
    capturePrm.numVipInst = 1;
    capturePrm.outQueParams[0].nextLink = gVdisModuleContext.displayId[VDIS_DEV_HDMI];
    capturePrm.tilerEnable              = FALSE;

    pCaptureInstPrm                     = &capturePrm.vipInst[0];
    pCaptureInstPrm->vipInstId          = SYSTEM_CAPTURE_INST_VIP0_PORTA;
    pCaptureInstPrm->videoDecoderId     = SYSTEM_DEVICE_VID_DEC_TVP7002_DRV;
    pCaptureInstPrm->inDataFormat       = SYSTEM_DF_YUV422P;
    pCaptureInstPrm->standard           =  SYSTEM_STD_1080P_60;
    pCaptureInstPrm->numOutput          = 1;

    pCaptureOutPrm                      = &pCaptureInstPrm->outParams[0];
    pCaptureOutPrm->dataFormat          = SYSTEM_DF_YUV420SP_UV;
    pCaptureOutPrm->scEnable            = FALSE;
    pCaptureOutPrm->outQueId            = 0;

    /*Initialize Display link params*/
    MULTICH_INIT_STRUCT(DisplayLink_CreateParams,displayPrm);
    displayPrm.inQueParams[0].prevLinkId = gVcapModuleContext.captureId;
    displayPrm.inQueParams[0].prevLinkQueId = 0;
    displayPrm.displayRes = SYSTEM_STD_480I;
    displayPrm.displayId  = DISPLAY_LINK_DISPLAY_BP0;

    /*Create Links*/
    /* create capture link.*/
    System_linkCreate(gVcapModuleContext.captureId, &capturePrm, sizeof(capturePrm));
    /* create display link.*/
    System_linkCreate(gVdisModuleContext.displayId[VDIS_DEV_HDMI], &displayPrm, sizeof(displayPrm));

    ADV723 input has to be in the same video format, interlaced PAL or NTSC

    So, What format it needs to be configured to HDCOMP

    HDMI is blended with HDCOMP.


    Regards,

    Rajesh Kannan S

  • Why use HDDAC? You could SDDAC for SVideo output. HDDAC is not tested for SVideo output.

    Rgds,
    Brijesh
  • Hi Brijesh,

    Thanks for your reply.

    We are using ADV723 encoder which is connected to HDCOMP in DM388.

    Is there any other way to test with HDDAC ?

    Regards,

    Rajesh Kannan S

  • Hi Brijesh,

    Whether IPNC RDK 3.9.1 has support to provide S-Video output using HDDAC ???

    If yes, what are the support needs to be done.

    Kindly suggest me.

    Regards,

    Rajesh Kannan S
  • Thanks for the response.

    Is S-Video(NTSC\PAL) output supported using HDDAC in IPNC RDK 3.9.1 ?

    I believe on DM388 S-Video is not supported on SDDAC, is that correct?

    We need S-Video Out to support NTSC\PAL so we are connecting HDDAC output to NTSC\PAL encoder-ADV723 on our custom board.

    --Narasimha

  • SVideo output from HDCOMP is never validated and i am not even sure if it is supported. I would suggest using SDVENC for this output.

    Regads,
    Brijesh
  • Hi Brijesh,

    Thanks for the suggestion,

    How can we use SDVENC(Composite) pin TV_OUT0 to s-video (y/c)?

    Regards,
    RAJ M
  • Please check the TRM, if SDVENC outputs on this pin, then it is possible. otherwise not.

    Regards,
    Brijesh
  • Is it possible to support 480i and/or 576i RGB format output through HD-DAC?

  • Hi Brijesh,

    You said earlier forum component output tested on HDCOMP.

    What is the display Resolution tested?

    Whether TI tested component output(NTSC,PAL) on HDCOMP?

    Regards,
    RAJ M
  • Hi Raj,

    I think some VESA and 1080p/720p resolutions were tested in HDCOMP output..
    But as far as i remember, not NTSC/PAL. NTSC/PAL output requires specific signal level and requires to be based on the NTSC/PAL standard. I am not sure if HDCOMP can generate exact NTSC/PAL signals..

    Regards,
    Brijesh
  • Hi Brijesh,

    Thanks for the clarification.

    I tested SYSTEM_STD_480I resolution on HDCOMP output successfully.

    Is it possible 480i component output to s-video output (conversion using external Video converter)?

    Will it s-video display support 480i or only NTSC/PAL?

    What is the difference between NTSC and 480i?

    Regards,
    RAJ M
  • Hi Raj,


    Please check the NTSC specs to know difference between NTSC and 480i.
    Please check TRM of DM388 to see if HDCOMP can support SVideo output.

    Regards,
    Brijesh
  • Hi,

    Is it possible to output Interlace format on HDCOMP?

    Regards,
    RAJ M
  • Yes, i think 1080i is tested on HDCOMP. Any issues that you are seeing?

    Rgds,
    Brijesh
  • Hi,

    When I test 480I FVID2_setFormat() fuction getting failed.

    Below code i add
    pObj->createArgs.displayRes == VSYS_STD_480I) in
    ipnc_rdk/ipnc_mcfw/mcfw/src_bios6/links_m3vpss/display/displayLink_drv.c

    if (pObj->createArgs.displayRes == VSYS_STD_1080I_60
    ||
    pObj->createArgs.displayRes == VSYS_STD_NTSC
    ||
    pObj->createArgs.displayRes == VSYS_STD_PAL
    ||
    pObj->createArgs.displayRes == VSYS_STD_480I)
    {
    Int i;

    pFormat->scanFormat = FVID2_SF_INTERLACED;
    pFormat->fieldMerged[0] = TRUE;
    if (DisplayLink_drvIsSDDef(pObj))
    {
    for (i = 0; i < pObj->createArgs.numInputQueues; i++)
    {
    if (pObj->fieldInput[i] == TRUE)
    {
    pFormat->fieldMerged[0] = FALSE;
    }
    }
    if (DisplayLink_drvDoInputPitchDoubling(pObj))
    {
    pFormat->pitch[0] *= 2;
    pFormat->pitch[1] *= 2;
    pFormat->pitch[2] *= 2;
    }
    }
    }

    Regards,
    RAJM
  • Hi,

    I tried to create 1080I on HDCOMP. but while creating the display link FVID2_setFormat() failed?

    Regards,
    RAJM
  • Hi Brijesh,

    Is 480i and 576i RGB output possible through HDCOMP? i am using IPNC RDK 3.9.1.

  • Hi Narsimha,

    It should be, don't know or don't remember if it is tested. Please try it out.

    Rgds,

    Brijesh

  • Hi Brijesh,

    I tried 480i output on HDCOMP but i get 480p output on display

    I see following check in Display link. Only for 1080i, NTSC, PAL scan format is set to interlaced. Maybe that's why i get progressive output even when i selected 480i in display link.

    Do you have any suggestions on what i should try to get 480i output??

    File: ipnc_rdk/ipnc_mcfw/mcfw/src_bios6/links_m3vpss/display/displayLink_drv.c

     

    DisplayLink_drvDisplayCreate(){

    ....

     

        if (pObj->createArgs.displayRes == VSYS_STD_1080I_60

            ||

            pObj->createArgs.displayRes == VSYS_STD_NTSC

            ||

            pObj->createArgs.displayRes == VSYS_STD_PAL)

        {

            Int i;

     

            pFormat->scanFormat = FVID2_SF_INTERLACED;

            pFormat->fieldMerged[0] = TRUE;

            if (DisplayLink_drvIsSDDef(pObj))

            {

                for (i = 0; i < pObj->createArgs.numInputQueues; i++)

                {

                    /* if we are going to get field input we should

                     * not enable field merged mode in the driver

                     * since we need to seamlessly switch from

                     * one input queue to another and changing

                     * field merged mode is not supported at

                     * runtime.

                     */

                    if (pObj->fieldInput[i] == TRUE)

                    {

                        pFormat->fieldMerged[0] = FALSE;

                    }

                }

                if (DisplayLink_drvDoInputPitchDoubling(pObj))

                {

                    pFormat->pitch[0] *= 2;

                    pFormat->pitch[1] *= 2;

                    pFormat->pitch[2] *= 2;

                }

            }

        }

    ......

    }


    ...Please

    Please find below my display tree and usecase details:

     

    1. Display Tree

     

    Vps_DcConfig gSystem_dctrlTriDisplayConfig = {

        VPS_DC_USERSETTINGS,

        {

            {VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX},

            {VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},

            {VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDMI_BLEND},

     

            {VPS_DC_BP1_INPUT_PATH, VPS_DC_HDCOMP_MUX} ,

            {VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT} ,

            {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND},

     

            {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_HDCOMP_BLEND},

     

            {VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},

            {VPS_DC_AUX_INPUT_PATH, VPS_DC_HDCOMP_MUX}

        },

     

        9u,

        /* VENC information */

        {

         /* Mode information */

         {

          {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_60}

           },                                                    /* 1080p30 is mode

                                                                * is overwritten

                                                                * later inside

                                                                * System_displayCtrlInit

                                                                */

          {VPS_DC_VENC_DVO2, {FVID2_STD_1080P_60}

          },                                                   /* 1080p30 is mode

                                                                * is overwritten

                                                                * later inside

                                                                * System_displayCtrlInit

                                                                */

         },

        

         (VPS_DC_VENC_DVO2 | VPS_DC_VENC_HDCOMP),       /* Tied VENC bit mask */

         2U

        }

    }

     

     

    2. Usecase (pipeline)

     

        gVcapModuleContext.captureId                = SYSTEM_LINK_ID_CAPTURE;

        gVdisModuleContext.displayId[VDIS_DEV_HDCOMP] = SYSTEM_LINK_ID_DISPLAY_0;

     

        /*Initialize Capture Link params*/

        CaptureLink_CreateParams_Init(&capturePrm);

        capturePrm.numVipInst = 1;

     

        pCaptureInstPrm                     = &capturePrm.vipInst[0];

        pCaptureInstPrm->vipInstId          = SYSTEM_CAPTURE_INST_VIP0_PORTA;

        pCaptureInstPrm->videoDecoderId     = SYSTEM_DEVICE_VID_DEC_TVP7002_DRV;

        pCaptureInstPrm->inDataFormat       = SYSTEM_DF_RGB24_888;//SYSTEM_DF_YUV422P;

        pCaptureInstPrm->standard           = SYSTEM_STD_1080P_60;

        pCaptureInstPrm->numOutput          = 1;

     

        pCaptureOutPrm                      = &pCaptureInstPrm->outParams[0];

        pCaptureOutPrm->dataFormat          = SYSTEM_DF_YUV422I_YUYV;

        pCaptureOutPrm->scEnable            = FALSE;

        pCaptureOutPrm->outQueId            = 0;

        capturePrm.outQueParams[0].nextLink = gVdisModuleContext.displayId[VDIS_DEV_HDCOMP];

        capturePrm.tilerEnable              = FALSE;

     

        /*Initialize Display link params*/

        MULTICH_INIT_STRUCT(DisplayLink_CreateParams,displayPrm);

        displayPrm.inQueParams[0].prevLinkId = gVcapModuleContext.captureId;

        displayPrm.inQueParams[0].prevLinkQueId = 0;

        displayPrm.displayRes = SYSTEM_STD_480I;

        displayPrm.displayId  = DISPLAY_LINK_DISPLAY_BP1;

    Thanks,

    Narasimha

  • Hi Brijesh,

    When I test 480i i am getting 480p output on display from HDCOMP.

    I see below check in displaylink. scanformat is set to interlaced only for 1080i, NTSC and PAL.

    Does this mean interlaced output is restricted only for 1080i, NTSC and PAL? Any suggestions how to get 480i output?

    i am using BP1 path.

    ipnc_rdk/ipnc_mcfw/mcfw/src_bios6/links_m3vpss/display/displayLink_drv.c

    if (pObj->createArgs.displayRes == VSYS_STD_1080I_60
    ||
    pObj->createArgs.displayRes == VSYS_STD_NTSC
    ||
    pObj->createArgs.displayRes == VSYS_STD_PAL)
    {
    Int i;

    pFormat->scanFormat = FVID2_SF_INTERLACED;
    pFormat->fieldMerged[0] = TRUE;
    if (DisplayLink_drvIsSDDef(pObj))
    {
    for (i = 0; i < pObj->createArgs.numInputQueues; i++)
    {
    /* if we are going to get field input we should
    * not enable field merged mode in the driver
    * since we need to seamlessly switch from
    * one input queue to another and changing
    * field merged mode is not supported at
    * runtime.
    */
    if (pObj->fieldInput[i] == TRUE)
    {
    pFormat->fieldMerged[0] = FALSE;
    }
    }
    if (DisplayLink_drvDoInputPitchDoubling(pObj))
    {
    pFormat->pitch[0] *= 2;
    pFormat->pitch[1] *= 2;
    pFormat->pitch[2] *= 2;
    }
    }
    }


    My display tree and usecase details are below:

    1. Display Tree

    Vps_DcConfig gSystem_dctrlTriDisplayConfig = {
    VPS_DC_USERSETTINGS,
    {
    {VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX},
    {VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},
    {VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDMI_BLEND},

    {VPS_DC_BP1_INPUT_PATH, VPS_DC_HDCOMP_MUX} ,
    {VPS_DC_HDCOMP_MUX, VPS_DC_CIG_PIP_INPUT} ,
    {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_DVO2_BLEND},

    {VPS_DC_CIG_PIP_OUTPUT, VPS_DC_HDCOMP_BLEND},

    {VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},
    {VPS_DC_AUX_INPUT_PATH, VPS_DC_HDCOMP_MUX}
    },

    9u,
    /* VENC information */
    {
    /* Mode information */
    {
    {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_60}
    }, /* 1080p30 is mode
    * is overwritten
    * later inside
    * System_displayCtrlInit
    */
    {VPS_DC_VENC_DVO2, {FVID2_STD_1080P_60}
    }, /* 1080p30 is mode
    * is overwritten
    * later inside
    * System_displayCtrlInit
    */
    },

    (VPS_DC_VENC_DVO2 | VPS_DC_VENC_HDCOMP), /* Tied VENC bit mask */
    2U
    }
    }


    2. Usecase (pipeline)

    gVcapModuleContext.captureId = SYSTEM_LINK_ID_CAPTURE;
    gVdisModuleContext.displayId[VDIS_DEV_HDCOMP] = SYSTEM_LINK_ID_DISPLAY_0;

    /*Initialize Capture Link params*/
    CaptureLink_CreateParams_Init(&capturePrm);
    capturePrm.numVipInst = 1;

    pCaptureInstPrm = &capturePrm.vipInst[0];
    pCaptureInstPrm->vipInstId = SYSTEM_CAPTURE_INST_VIP0_PORTA;
    pCaptureInstPrm->videoDecoderId = SYSTEM_DEVICE_VID_DEC_TVP7002_DRV;
    pCaptureInstPrm->inDataFormat = SYSTEM_DF_RGB24_888;//SYSTEM_DF_YUV422P;
    pCaptureInstPrm->standard = SYSTEM_STD_1080P_60;
    pCaptureInstPrm->numOutput = 1;

    pCaptureOutPrm = &pCaptureInstPrm->outParams[0];
    pCaptureOutPrm->dataFormat = SYSTEM_DF_YUV422I_YUYV;
    pCaptureOutPrm->scEnable = FALSE;
    pCaptureOutPrm->outQueId = 0;
    capturePrm.outQueParams[0].nextLink = gVdisModuleContext.displayId[VDIS_DEV_HDCOMP];
    capturePrm.tilerEnable = FALSE;

    /*Initialize Display link params*/
    MULTICH_INIT_STRUCT(DisplayLink_CreateParams,displayPrm);
    displayPrm.inQueParams[0].prevLinkId = gVcapModuleContext.captureId;
    displayPrm.inQueParams[0].prevLinkQueId = 0;
    displayPrm.displayRes = SYSTEM_STD_480I;
    displayPrm.displayId = DISPLAY_LINK_DISPLAY_BP1;


    Thanks,
    Narasimha
  • You want output resolution to be 480i?? in that case, you should first change in display controller tree and see if displays correctly background color.
    Then you should try connecting video pipeline (BP1) to the display..

    Rgds,
    Brijesh
  • Hi Brijesh,

    I tried with default Display control tree with 480I Display resolution with SC1,SC2,BP0 path all are same progressive out put only

    Vps_DcConfig gSystem_dctrlTriDisplayConfig = {

       VPS_DC_USERSETTINGS,                                   /* Use Case */

       /* Edge information */

       {

           {VPS_DC_BP0_INPUT_PATH, VPS_DC_VCOMP_MUX},

           {VPS_DC_VCOMP_MUX, VPS_DC_VCOMP},

           {VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDMI_BLEND},

           {VPS_DC_CIG_NON_CONSTRAINED_OUTPUT, VPS_DC_HDCOMP_BLEND},

           {VPS_DC_SEC1_INPUT_PATH, VPS_DC_SDVENC_MUX},

           {VPS_DC_SDVENC_MUX, VPS_DC_SDVENC_BLEND},

           {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDMI_BLEND},

           {VPS_DC_GRPX0_INPUT_PATH, VPS_DC_HDCOMP_BLEND},

           {VPS_DC_GRPX2_INPUT_PATH, VPS_DC_SDVENC_BLEND},

           {VPS_DC_MAIN_INPUT_PATH, VPS_DC_VCOMP},

           {VPS_DC_AUX_INPUT_PATH, VPS_DC_VCOMP_MUX},

           {VPS_DC_BP1_INPUT_PATH, VPS_DC_SDVENC_MUX},

       },

       12,

       /* VENC information */

       {

        /* Mode information */

        {

         {VPS_DC_VENC_HDMI, {FVID2_STD_1080P_60}

          }

         ,                                                    /* 1080p30 is mode

                                                               * is overwritten

                                                               * later inside

                                                               * System_displayCtrlInit

                                                               */

      {VPS_DC_VENC_HDCOMP, {FVID2_STD_1080P_60}

         },                                                   /* 1080p30 is mode

                                                               * is overwritten

                                                               * later inside

                                                               * System_displayCtrlInit

                                                               */

         {VPS_DC_VENC_SD, {FVID2_STD_NTSC}

          }

         }

        ,

        (VPS_DC_VENC_HDMI | VPS_DC_VENC_HDCOMP),                /* Tied VENC bit

                                                               * mask */

        3u                                                    /* Number of VENCs

                                                               */

        }

    };

    capture input (SXGA) from TVP7002

    Display output: