Tool/software: Linux
Hi,
I am having some trouble with gpio's on port 0. Once any gpio on port 0 is passed to pinctrl-0 I cannot control any gpio pin on port 0 from /sys/class/gpio. I can export the pin but setting it as an output and changing the value does not work.
To clarify, after declaring a single gpio on port 0 none of the gpio pins on port 0 will work. Now if i don't declare any gpio's in device tree, I can control them all from sysfs.
I have gpio's on ports 2 and 3 and they all work after i declare them in device tree so the issue is only with port 0. My dts looks like this:
&am33xx_pinmux {
//POE controller
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x16c ( PIN_INPUT | MUX_MODE3 ) // (F18) uart0_rtsn.I2C1_SCL
0x168 ( PIN_INPUT | MUX_MODE3 ) // (F19) uart0_ctsn.I2C1_SDA
>;
};
gpio3_pins: pinmux_gpio3_pins {
pinctrl-single,pins = <
0x108 ( PIN_INPUT | MUX_MODE7 ) // (J19) gmii1_col.gpio3[0]
0x10c ( PIN_INPUT | MUX_MODE7 ) // (J18) gmii1_crs.gpio3[1]
0x110 ( PIN_INPUT | MUX_MODE7 ) // (K19) gmii1_rxer.gpio3[2]
>;
};
gpio2_pins: pinmux_gpio2_pins {
pinctrl-single,pins = <
0x88 ( PIN_INPUT | MUX_MODE7 ) // (U17) gpmc_csn3.gpio2[0] USB select
0x9c ( PIN_INPUT | MUX_MODE7 ) // (V8) gpmc_be0n_cle.gpio2[5] \USB_MUX_OE
>;
};
gpio0_pins: pinmux_gpio0_pins {
pinctrl-single,pins = <
0x164 ( PIN_INPUT | MUX_MODE7 ) // (E18) eCAP0_in_PWM0_out.gpio0[7] \USB_OC
0x178 ( PIN_INPUT | MUX_MODE7 ) // (E17) uart1_ctsn.gpio0[12] SMAC done
0x17c ( PIN_INPUT | MUX_MODE7 ) // (D19) uart1_rtsn.gpio0[13] ASRC done
0x1b0 ( PIN_INPUT | MUX_MODE7 ) // (C15) xdma_event_intr0.gpio0[19] SMAC_INIT
0x1b4 ( PIN_INPUT| MUX_MODE7 ) // (B15) xdma_event_intr1.gpio0[20] ASRC_INIT
0x144 ( PIN_OUTPUT | MUX_MODE7 ) // (K18) rmii1_refclk.gpio0[29] SMAC prog
0x74 ( PIN_OUTPUT | MUX_MODE7 ) // (W18) gpmc_wpn.gpio0[31] ASRC prog
//0x148 ( PIN_OUTPUT | MUX_MODE7 ) // (P17) mdio_data.gpio0[0] MDIO BB data
//0x14c ( PIN_OUTPUT | MUX_MODE7 ) // (R19) mdio_clk.gpio0[1] Mdio BB clock
>;
};
};
&gpio0 {
pinctrl-names = "default";
pinctrl-0 = <&gpio0_pins>;
tatus = "okay";
};
&gpio2 {
pinctrl-names = "default";
pinctrl-0 = <&gpio2_pins>;
status = "okay";
/*
usb_s {
gpio-hog;
gpios = <0 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "usb_select";
};
*/
};
&gpio3 {
pinctrl-names = "default";
pinctrl-0 = <&gpio3_pins>;
status = "okay";
};
I can see that the gpio's have been passed to the kernel and they appear the same as the gpio's on ports 2 and 3:
root:.../pinctrl/44e10800.pinmux# cat pinmux-pins | grep gpio0
pin 29 (PIN29): 44e07000.gpio (GPIO UNCLAIMED) function pinmux_gpio0_pins groups
pin 81 (PIN81): 44e07000.gpio (GPIO UNCLAIMED) function pinmux_gpio0_pins groups
pin 89 (PIN89): 44e07000.gpio (GPIO UNCLAIMED) function pinmux_gpio0_pins groups
pin 94 (PIN94): 44e07000.gpio (GPIO UNCLAIMED) function pinmux_gpio0_pins groups
pin 95 (PIN95): 44e07000.gpio (GPIO UNCLAIMED) function pinmux_gpio0_pins groups
pin 108 (PIN108): 44e07000.gpio (GPIO UNCLAIMED) function pinmux_gpio0_pins gros
pin 109 (PIN109): 44e07000.gpio (GPIO UNCLAIMED) function pinmux_gpio0_pins gros
Does anyone have any ideas why port 0 would behave like this? Thanks fro your help
Dave
