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RTOS/AM5728: Exception on mailbox access through CSL

Daniel Castagnola Weckesser
Intellectual 410 points

Part Number: AM5728
Other Parts Discussed in Thread: SYSBIOS

Tool/software: TI-RTOS

Is it possible to use AM5728 mailboxes #2 to #13 on SYSBIOS by means of CSL functions ?

I get an exception every time a I try to configure or access them. Contrarily, mailbox #1 seems to work OK.

Thanks,

Daniel

  • 0
    TI__Guru* 95265 points
    Hi,

    Can you clarify Processor SDK RTOS release used and what example for mailbox application? Or do you have a SYSBIOS CCS project showing the issue?

    Regards, Eric
  • 0 in reply to lding
    Intellectual 410 points

    Hi Eric,

    Thank you for your reply.

    I am using Processor SDK RTOS version 4.01.00.06, but I wasn't able to find examples of mailbox usage therein, so I wrote my own test application.

    This application configures some maibox queues which are periodically written from a timer ISR, so the queues are lately read from the mailbox ISRs.

    The test works fine ONLY on the AM5728 mailbox #1, and fails as soon as it tries to setup any mailbox from #2 to #13 throwing an unhandled exception .

    I realized that mailbox 1 is mapped on L4_CFG as "problematic" mailboxes are mapped on L4_PER3, so I am suspecting that the problem is related to this feature.

    Any idea... ?

    Thanks again,

    Daniel

    mailbox_test.zip

  • 0 in reply to Daniel Castagnola Weckesser
    TI__Guru* 95265 points
    Hi,

    Thanks for providing the CCS project for debug. I went through your code:

    CSL_xbarMpuIrqConfigure(CSL_XBAR_INST_MPU_IRQ_52, CSL_XBAR_MAILBOX2_IRQ_USER0); ====> worked properly

    mailboxEnableNewMsgInt(SOC_MAILBOX2_BASE, 0, MAILBOX_QUEUE_0); =====> this crashed

    CSL_MPU_MAILBOX2_REGS (0x4883a000U)

    You need to set the MMU for this region in .cfg, like Mmu.setSecondLevelDescMeta(0x4883a000, 0x4883a000, attrs);

    Then it worked.

    Regards, Eric
  • 0 in reply to lding
    Intellectual 410 points
    Thank you very much indeed.

    Regards,
    Daniel