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TMS320DM8148: PCI Scan does not find any Devices

Kim Steiner
Intellectual 770 points

Part Number: TMS320DM8148

Hi.  We are using ti-ezsdk_dm8148-evm_ 5_05_02_00 which include linux version 04.04.00.02 on custom boards that have a DM8148.  The PCIe bus does not seem to be detected during startup.  Here is small listing from dmesg command:

registered ti81xx_vin device
ti81xx_pcie: Invoking PCI BIOS...
ti81xx_pcie: Setting up Host Controller...
ti81xx_pcie: Register base mapped @0xd0820000
ti81xx_pcie: forcing link width - x1
ti81xx_pcie: Starting PCI scan...
PCI: bus0: Fast back to back transfers enabled
ti81xx_pcie: PCI scan done.

This only happens on some of the custom boards.  On the boards where pcie seems to work I get more information from dmesg:

registered ti81xx_vin device
ti81xx_pcie: Invoking PCI BIOS...
ti81xx_pcie: Setting up Host Controller...
ti81xx_pcie: Register base mapped @0xd0820000
ti81xx_pcie: forcing link width - x1
ti81xx_pcie: Starting PCI scan...
pci 0000:00:00.0: [104c:b801] type 1 class 0x000604
PCI: bus0: Fast back to back transfers disabled
pci 0000:01:00.0: [104c:b006] type 0 class 0x000480
pci 0000:01:00.0: reg 10: [mem 0x00000000-0x00000fff]
pci 0000:01:00.0: reg 14: [mem 0x00000000-0x01ffffff pref]
pci 0000:01:00.0: reg 18: [mem 0x00000000-0x01ffffff pref]
pci 0000:01:00.0: reg 1c: [mem 0x00000000-0x01ffffff pref]
pci 0000:01:00.0: reg 20: [mem 0x00000000-0x01ffffff pref]
pci 0000:01:00.0: reg 24: [mem 0x00000000-0x01ffffff pref]
PCI: bus1: Fast back to back transfers disabled
ti81xx_pcie: PCI scan done.

So it seems like the pcie isn't working?  Is that true?  I looked at registers DEBUG0 (0x51001728) and DEBUG1(0x5100172c) on one of the boards that don't work.  The values are 0x00001900 and 0x08200000.  Is there a way for me to get the pcie running correctly on this board?  

Thanks,

Kim

  • 0
    Intellectual 770 points
    After further investigation, this issues seems to have to do with the c6657 DSP. What I've observed is that I can jtag to the c6657 and load an initial program (which configures the PLL and other things). But if I set a breakpoint in the program it is never hit. If I first run the gel file Init_mainPll and then load the initial program, I am able to get to a breakpoint I set. Then it kind of makes sense that my previous post is showing pcie not found because the c6657 is not responding correctly. Do you have any idea why this could be? And why running the gel file Init_mainPll function makes the c6657 start working?

    Any help would be great.
    Thanks,
    Kim
  • 0 in reply to Kim Steiner
    Intellectual 770 points
    It seems that the issue is something in relation to the PLL clock as stated in the previous post. The c6657 is a 1.25GHz part, but running it at that speed didn't seem to work on startup. So we ended up working around the issue by making the c6657 run at a lower speed on startup. This fixed the issue we were seeing with PCIe and the c6657.
  • 0 in reply to Kim Steiner
    TI__Guru**** 170625 points
    Hi Kim,

    Thanks for sharing the solution. Note also that C6657 DSP is supported in Keystone forum:

    e2e.ti.com/.../639

    Regards,
    Pavel