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CCS/EVMK2H: How to boot from NOR or NAND

Justin Shatto
Prodigy 100 points
Part Number: EVMK2H


Tool/software: Code Composer Studio

We have an evmK2H evaluation board, and have compiled and run several example sys/bios programs as well as our own custom applications. Our application are running on DDR3. 

We would like to boot through either NOR or NAND flash. 

Can anyone point me to a link or documentation on how to run the example programs off of NOR or NAND?

I have attempted to convert the .out files by outputting the HEX

using

B2ccs.exe

ccsaddGphdr.exe

ccsaSdGptlr.exe

and using the nandwriter and norwriter to flash the image.

Are there extra steps I am missing? I have read conflicting information about the RBL initializing DDR3.

Do I need to use a secondary bootloader to initialize DDR3 myself, or is it done automatically via the RBL?

  • 0
    TI__Guru** 116560 points

    Justin,

    If I have not yet provided this reference, I would like you to look at the examples for NAND boot that we  have provided here:

    http://processors.wiki.ti.com/index.php/KeystoneII_Boot_Examples

    The Makefile under the path Keystone_boot-examples\examples\k2h\nand\singleStage\makkefile, demonstrates the tools and the sequence in which they need to be used to build the boot image.

    We currently don`t support NAND booting in our RTOS software offering due to limited NAND boot use cases. The current support is only for SPI NOR boot mode using a secondary bootloader that is designed to initialize DDR and deploy multi-core application binaries across multiple cores as described here:

    http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_BOOT_K2H/E/L

    As far as initializing the DDR is concerned, the ROM bootloader does allow for users to provide a DDR configuration table with the boot image that can be used for initializing the external memory but this feature is hard to debug as ROM code is a black box to the end users so we recommend that you explore using a secondary boot that initializes DDR and then loads the application similar to what we have done with the Processor SDK RTOS bootloader.

    If you are interested in seeing how the DDR configuration table wors with the ROM code then refer to the K2E EVM example in the Keystone II Boot eamples packages at location:

    Keystone_boot-examples\examples\src\multiStage\Stage1.c

    Regards.

    Rahul

  • 0 in reply to Rahul Prabhu
    Prodigy 100 points
    We are using CCS versions 7.3. The Armhex utility is now incorporated into Code Composer. What is the proper hex format to use when converting my .out file to .hex prior to using b2cc.exe?
  • 0 in reply to Justin Shatto
    TI__Guru** 116560 points

    Description of order to use to create the boot image is in the makefiles in keystone II Boot examples. the sequence appears as follows:

     $(ARM_BIN_FOLDER)/armhex nand.out $(LOCAL_BUILD_FOLDER)/singleStage.rmd

    $(LOCAL_UTILS_FOLDER)/btoccs/b2ccs.exe Stage1.hex nand.ccs.dat

    $(LOCAL_UTILS_FOLDER)/ccsutil/ccsAddGphdr.exe -infile nand.ccs.dat -outfile nand.ccs.dat.gphdr -headerEndian BE

    $(LOCAL_UTILS_FOLDER)/ccsutil/ccsAddGptlr.exe -infile nand.ccs.dat.gphdr -outfile nand.ccs.dat.gphdr.gptlr

    cp nand.ccs.dat.gphdr.gptlr ./bin/nandImage.dat

    Regards,

    Rahul