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RTOS/TMS320C6748: SPI CS Staying Inactive

Tim Simerly
Genius 10095 points

Part Number: TMS320C6748

Tool/software: TI-RTOS

Dear Support:

I am using the SPI driver on the TI Processor SDK for the C6748 and have noticed that the SPI CS does not go inactive high after issuing a SPI_tansfer(...) command.  The SPI CS goes active low and the clock and SOMI data come out as expected along with an active low CS, however the CS does not go inactive high after the SPI_transfer(...) command.  Can you tell me what I need to do to make the SPI CS signal go inactive high after the SPI clock and data stops the transfer?  Please advise.

Thanks,
Tim

  • 0
    TI__Mastermind 27355 points

    Hi Tim,

    If the C6748 is in master mode, this can be controlled using the CSHOLD bit in the SPI transmit data register (SPIDAT1), see section 2.5.1.4 of the SPI User's Guide: www.ti.com/.../sprufm4i.pdf

    Writing a 0 will cause the CS signal to deactivate at the end of a transfer. However, this bit is ignored in slave mode, which is what I suspect is happening here. Can you clarify which mode the C6748 is in?

    Regards,
    Sahin

  • 0 in reply to Sahin Okur
    TI__Genius 10095 points

    Hey Sahin:

    Ok, thanks for the info and understand.  Can you provide a simple way of accessing the SPI hardware registers using the Processor SDK API?   From what I can tell, I don't see this modification supported with the existing API and if so, is there any example code or reference you can provide of how to access the peripheral registers while using the Processor SDK RTOS?   I tried doing this with the XDS200 by clearing this bit before I kicked off the SP_transfer(...) call and it didn't work.

    Thanks,
    Tim

  • 0 in reply to Tim Simerly
    TI__Mastermind 27355 points
    This was resolved offline.