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Memory alignment in DM6437EVM

Thupakula
Intellectual 765 points

Hi ,

Can any one tel me about the memory alignment on DM6437EVM?

1) According to spru986b.pdf it is byte aligned. Does any one confirm the same if it is  Byte aligned or unaligned by default ?

2) In  DM6437, Does DDR2 allow Big Endian ?

Thank you ,

Thupakula.

 

  • 0
    TI__Mastermind 41665 points

    Thupakula said:
    1) According to spru986b.pdf it is byte aligned. Does any one confirm the same if it is  Byte aligned or unaligned by default ?

    I am not sure what you are asking for here, the bus is right aligned so that the 16 bit device would be on the lower bits of the data bus as discussed in section 2.5 of SPRU986.

    Thupakula said:
    2) In  DM6437, Does DDR2 allow Big Endian ?

    The DM6437 only supports little endian operation.