Part Number: AM5728
Hi,
When setting the Enable DSS internal SCP interface of Table 11-15 DSS Initialization Sequence of TRM,
Is it OK to set the following bits of the DSI_CLK_CTRL register at the same time?
Table 11-81. DSI_CLK_CTRL
bit 31: 30, PLL_PWR_CMD
bit 14, CIO_CLK_ICG
It is not listed in Table 11-15 DSS Initialization Sequence of the TRM.
Our customer seems to be operating normally at the same time.
Best Regards,
Shigehiro tsuda
