How to enable SDRAM clock on TMS320C5504?

Mushtaq Syed56993

Hi:
I am trying to figure which bit in the clock configurations register (CCR1) is for enabling the SDRAM clock. It is stated on page 17 of SPRUGU6 "The SDCLK_EN bit must be set in the Clock Configuration register 1 (CCR1) 0x1C1E to turn on the SDRAM clock." Hovever, we find out from SPRUGL6A, page 43, that all the bits of CCR1 are reserved! Could you please let me know which bit of which register is to be used to enable the SDRAM clock.
Thanks a lot.
Cheers,
Mushtaq

over 14 years ago

0 Peter Chung over 14 years ago

TI__Expert 8065 points

Mushtaq,

The C5505 EMIF user's guide (SPRUGU6) is correct. The SDCLK_EN bit is the bit 0 of the CCR1 register(0x1C1E). The SPRUGL6A is the system user's guide for the VC5505 not for the C5505. We are working on the system guide for the C5505. The bit was a reserved bit for the VC5505, but for C5505 it is SDCLK_EN bit.

You need to set the bit to 1 to enable the SDRAM Clock.

Best Regards,

Peter Chung

0 Peter Chung over 14 years ago in reply to Peter Chung