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TMS320C6748: Failed to program by XDS110 when program loaded in DDR

AAAA PPPP
Expert 1410 points

Part Number: TMS320C6748

Hello,

I have been programming in c6748. I have been using SHRAM to load all section of my code. Then program built and burnt correctly using XDS110. When I tried to load program in DDR program built correct,but fail to program. I get error:

C674X_0: File Loader: Verification failed: Values at address 0xC0000000 do not match Please verify target memory and memory map.
C674X_0: GEL: File: D:\difar_intr\Debug\difar_intr.out: a data verification error occurred, file load failed.

I dont have any gel file. my .cmd is given below.

/****************************************************************************/
/* C6748.cmd */
/* Copyright (c) 2010 Texas Instruments Incorporated */
/* */
/* Description: This file is a sample linker command file that can be */
/* used for linking programs built with the C compiler and */
/* running the resulting .out file on a C6748 */
/* device. Use it as a guideline. You will want to */
/* change the memory layout to match your specific C6xxx */
/* target system. You may want to change the allocation */
/* scheme according to the size of your program. */
/* */
/****************************************************************************/

-stack 0x2000
-heap 0x1000

MEMORY
{
DSPL2ROM o = 0x00700000 l = 0x00010000 /* 1MB L2 Internal ROM */
DSPL2RAM o = 0x00800000 l = 0x00040000 /* 256kB L2 Internal RAM */
DSPL1PRAM o = 0x00E00000 l = 0x00008000 /* 32kB L1 Internal Program RAM */
DSPL1DRAM o = 0x00F00000 l = 0x00008000 /* 32kB L1 Internal Data RAM */
SHDSPL2ROM o = 0x11700000 l = 0x00010000 /* 1MB L2 Shared Internal ROM */
SHDSPL2RAM o = 0x11800000 l = 0x00040000 /* 256kB L2 Shared Internal RAM */
SHDSPL1PRAM o = 0x11E00000 l = 0x00008000 /* 32kB L1 Shared Internal Program RAM */
SHDSPL1DRAM o = 0x11F00000 l = 0x00008000 /* 32kB L1 Shared Internal Data RAM */
EMIFACS0 o = 0x40000000 l = 0x20000000 /* 512MB SDRAM Data (CS0) */
EMIFACS2 o = 0x60000000 l = 0x02000000 /* 32MB Async Data (CS2) */
EMIFACS3 o = 0x62000000 l = 0x02000000 /* 32MB Async Data (CS3) */
EMIFACS4 o = 0x64000000 l = 0x02000000 /* 32MB Async Data (CS4) */
EMIFACS5 o = 0x66000000 l = 0x02000000 /* 32MB Async Data (CS5) */
SHRAM o = 0x80000000 l = 0x00020000 /* 128kB Shared RAM */
DDR2 o = 0xC0000000 l = 0x08000000 /* 128MB DDR2 Data */
}

SECTIONS
{
.text > DDR2
.stack > DDR2
.bss > DDR2
.cio > DDR2
.const > DDR2
.data > DDR2
.switch > DDR2
.sysmem > DDR2
.far > DDR2
.args > DDR2
.ppinfo > DDR2
.ppdata > DDR2

/* COFF sections */
.pinit > DDR2
.cinit > DDR2

/* EABI sections */
.binit > DDR2
.init_array > DDR2
.neardata > DDR2
.fardata > DDR2
.rodata > DDR2
.c6xabi.exidx > DDR2
.c6xabi.extab > DDR2
}

i have not enabled any debugger memory map. I checked data verification error wiki page ,but was unable to resolve issue. Should I do some DDR initialization additionally in C program for loading to DDR? Please help.

Thanks in advance.

With Regards

Shalini

  • 0
    TI__Guru 65405 points
    The team is notified. They will post their feedback directly here.

    BR
    Tsvetolin Shulev
  • 0
    TI__Mastermind 27355 points
    Hi Shalini,

    Address 0xC0000000 corresponds to DDR memory which must be initialized using a GEL script. If you are using the LCDK board, make sure you create your target configuration for LCDKC6748 and not TMS320C6748.

    More details on GEL files and target configurations can be found here: software-dl.ti.com/.../sdto_ccs_debug-handbook.html
  • 0 in reply to Sahin Okur
    Expert 1410 points
    Hello,

    Thanks for reply. But I have not used .gel file till date, used only.cmd file and successfully programmed using on chip ram rom and shared ram rom. Why should i use gel script now?

    Thanks in advance

    With regards
    Shalini
  • 0 in reply to AAAA PPPP
    TI__Mastermind 27355 points
    Hi Shalini,

    That is because you want to load your code into DDR now, but before you can do that you need to initialize the DDR. This can't be done from code since it can't be loaded until the DDR is initialized. This needs to be done at startup, typically using a GEL file or bootloader.

    If you are using the C6748 LCDK board, it's gel file can be found at C:\ti\ccsv7\ccs_base\emulation\boards\lcdkc6748\gel. You can add it to your target configuration by going to the Advanced tab->C674X_0 and selecting it in the initialization script field.

    I recommend taking a look at this pdf if you would like to learn more about GEL files: www.ti.com/.../spraa74a.pdf
  • 0 in reply to Sahin Okur
    Expert 1410 points
    Hello,

    Thanks for reply. I was able to program with GEL file. But when I program with GEL file the program dont get in to ISR of I2C loopback. I tried with all sections in SHRAM with gel file. Still the program dont enter in to I2C ISR. But when I just remove the .gel file , all sections still in SHRAM program control is entering I2C ISR and program works file. Why do this happen?

    Thanks in advance

    With Regards
    Shalini