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C6416 Upgrading SDRAM Memory

Kris56541
Prodigy 25 points

I am using a C6416 device, and we have a need to support either 512Mb or 1024Mb (2 x 32 bit devices) of SDRAM on EMIFA.

In SPRA433E Section 2.6, it leads me to believe that this can be done. It seems by simply connecting the next address pin on the DSP after the bank selects, to the highest address pin of the large SDRAM, the DSP can be configured to work.

My question is: the app note does not explain what the user has to do in code or set-up, inorder to let the DSP know which configuration its in. I understand from the app note to configure the EMIF register for the smaller SDRAM, but in the case, where the larger parts are placed on the board, what tells the DSP, that it has access to the large one.

Thanks, Kris

  • 0
    TI__Intellectual 2620 points

    There's no specific setting per CE space since the toggling of the upper address bit needed for larger device will be handled automatically once the corresponding external address pin is connected. The explanation in section 2.6 of the app note can be clarified further with the use of figures 4-7, 4-8 and table 4-5 in SPRU266E.

    The app note example in section 2.6 refers to 2 memory types shown in figure 24. Type 1 having 19 row+column address and 2 bank enable bits thus requiring 24 logical byte address bits (A0 to A23), while type 2 requiring 25 or A24. To accomodate both types, the minimum range (type 1) is selected.  

    Figure 26 shows x16 128-Mbit and 256-Mbit SDRAM devices used. 8-bit column address A[8:1] appears on EA[10:3], and the row address A[22:9] through EA[16:3] for 128Mbit. Referring to table 4-5 and select the corresponding column address bits and interface bus width, one can verify whether EMIFA drives EA17 to output logical address A23 needed for the 256Mbit x 16 configuration.

    Because of the 16-bit page register size and 8/9/10 column address bits, not all configurations of SDRAM topology are supported. For 512Mbit SDRAM, 32Mx16 with 10 column address bits can be supported.