Hello,
I am using AM1808 device in our productions. uPP interfaces connect with a piece of fpga,working in duplex mode,8BIT mode,operaction clock 100MHz.
most of the time,uPP work fine.But rarely,the data recevied from uPP has 64-bytes shifting and once the shifting occurs,it will remain,
the data such as:
in normal condition:(start with 0x5555aaa,end with 0x3333cccc)
0000: 55 55 aa aa a0 1a 00 ba 5c 00 ce 00 ff ff ff ff
0010: ff ff 00 22 15 c4 06 80 08 00 45 00 00 4e 78 d0
0020: 00 00 40 11 85 19 c0 a8 fd 64 c0 a8 fd ff 00 89
0030: 00 89 00 3a 4e 37 8f fb 01 10 00 01 00 00 00 00
0040: 00 00 20 45 45 46 43 43 4f 46 44 45 48 43 4f 45
0050: 43 45 42 45 4a 45 45 46 46 43 4f 45 44 45 50 45
0060:4e 41 41 00 00 20 00 01 2a a5 75 bf 33 33 cc cc
And in error condition:(0x5555aaaa start in address 0x0040)
0000: dc 16 ea 01 03 00 cc cc 3c 00 96 34 ff ff ff ff
0010:ff ff 54 ee 75 65 ab 86 08 06 00 01 08 00 06 04
0020: 00 01 54 ee 75 65 ab 86 de 6f 70 65 00 00 00 00
0030: 00 00 de 6f 70 bc 00 00 00 00 00 00 00 00 00 00
0040: 55 55 aa aa a0 44 00 e4 04 01 98 34 ff ff ff ff
0050: ff ff 54 ee 75 65 ab 86 08 00 45 00 00 f4 21 cb
0060: 00 00 80 11 75 f7 64 64 64 6f 64 64 64 ff 00 8a
there are some problems:
1. which conditions can lead to this 64-bytes shifting?
2. once this shifting occurs,what should we do to resolve this shifting? such as empty the uPP fifo?
Does anyone have similar experiences,ideas,or advises to resolve my issue?
Thanks.
