Hello there
I am trying to get a DM365-based board booting from NAND Flash, with a Micron NAND Flash part. We can successfully boot this board from SD card and from SPI memory, and have u-boot and a linux kernel etc. running out of NAND Flash. It is the booting from NAND that are having trouble with. I am aware that other people are also having Device ID compatability issues with this processor and so am giving as much information as I can.
Our NAND Flash part is Micron MT29F8G08DAA-WP. This has a Manufacturer's Id of 0x2C and a Chip Id of 0xD3. Our DM365 silicon is Rev 1.2. There does seem to be differing opinion and information about whether such a device is actually supported by the DM365 RBL. We have made some close investigation of the boot process and I have some information to pass on, and some questions.
This Micron part has a block size of 0x40000, each block comprising 64 pages of 4096 bytes. At Block 1, page 0, of our flash (ie. 0x00040000) we have a UBL describer:
0xa1aced00 # FIELD 0: UBL magic number - safe mode
0x00000100 # FIELD 1: absolute start address in IRAM
0x00000008 # FIELD 2: number of pages in UBL
0x00000001 # FIELD 3: starting block Number of UBL code
0x00000001 # FIELD 4: starting page number of UBL code
# remaining locations in Block 1, page 0 filled with 0xff
and at Block 1, page 1, (0x00041000) of our flash we have the beginning of our UBL code.
The description on the NAND boot in SPRUFG5A says that:
a) if a valid UBL magic number is found, the block number where it is found is copied to IRAM address 0x7ffc)
b) The UBL code corresponding to the fields in the UBL describe are copied to IRAM, and then the absolute start address (Field 1 of the UBL describer above) is jumped to. We have been trying to follow these actions by connecting to our board via CCS once the board has failed to boot, and observing the contents of the IRAM. I am aware that this is not optimal, but here is what we are seeing:
- we see 0x00000001 at location 0x7ffc of IRAM, ie. the RBL appears to be finding the UBL magic number at block #1 of the NAND Flash (correct)
- at address 0x0020--0x0033 in IRAM, we see the whole of the UBL describer above (starting with the magic number)
- we then then see in IRAM what appears to be the rest of Block 1, page 0 (ie the remaining blank locations in block 1 above), copied to IRAM. This appears to end at around IRAM location 0x1000
- the UBL code found in the next page of our Flash cannot be seen in IRAM.
Note that the UBL describer appears to be the first thing copied, to location 0x00000020. I note that the description of NAND Flash boot mode in SPRUFG5A(pp. 169) explicitly says that the RBL will "copy the UBL [ie. not the describer] into Internal RAM, starting at 0x0000:0020".
We have performed similar examination of the IRAM after (successfully) booting via SD card. In this case we see:
- we see 0x00000008 at location 0x7ffc of IRAM, ie. the RBL appears to be finding the UBL magic number at block #8 of the SD Card (correct)
- we see in IRAM from location 0x00000020 the actual contents of the UBL. This is as we would expect from the description of MMC/SD boot (SPRUFG5A pp. 169).
I am hoping that this gives some information about what the RBL thinks the page and block size of our NAND Flash is. Specifically:
1) why is the RBL seeming to copy the UBL Describer itself, followed by the rest of that page, into IRAM?
1a) I wonder if it is possible that this is part of the action of the RBL, which would normally then be followed by a copy of the actual UBL code over the top of this? if so, perhaps this gives a clue what is happening...
2) Does the fact that the RBL appears to copy only one page imply that it is ignoring the FIELD 2 of our UBL describer, which says that our UBL has 8 pages?
FWIW we have also experimented with having a UBL magic number of 0xa1aced00, to select Legacy mode. This has made little difference to our observations.
I know that there have been considerable discussions on this forum regarding which NAND flash devices are actually supported. This thread:
http://e2e.ti.com/support/dsp/davinci_digital_media_processors/f/99/p/34519/120199.aspx#120199
refers to an entry in 'device_nand.c' which includes this line:
{ 0xD3, 4096, 64, 2048+64}, // 512 MB (4th ID byte will be checked)
I am guessing that device_nand.c is part of the RBL? if so this line seems to indicate that our device should work.
Any clues about what these observations tells us, and where to go from here?
Thanks and Regards
Jon Nicoll