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Linux/AM3358: Boot problem

Part Number: AM3358


Tool/software: Linux

Hello,

We have built a custom AM3358 board and the board layout of eval board was not followed.So with the help of forum and some expertise we are able to perform the software leveling and able to get the optimized timing parameters. After loading these values I was able perform all the DDR tests using CCS. Through code composer studio I was able to connect to board and see the memory , registers, SRAM content everything.

The problem is when I load the same values into ddr_def file , board.c file and generate customized MLO,u-boot.img and load it into MMC0, I have seen that PC(Program Counter) is stuck at 0x402f0440 and not moving further.

Even if we try to load the same into serial port , It was not booting.

The following is the output when I run dss script.

CONTROL: device_id = 0x2b94402e
* AM335x family
* Silicon Revision 2.1

PRM_DEVICE: PRM_RSTST = 0x00000001
* Bit 0 : GLOBAL_COLD_RST

CONTROL: control_status = 0x007f03d7
* SYSBOOT[15:14] = 01b (24 MHz)
* SYSBOOT[13:12] have been set improperly!
* SYSBOOT[11:10] = 11b ILLEGAL VALUE!
* SYSBOOT[9] = 0 GPMC CS0 Ignore WAIT input
* SYSBOOT[9] = 1 GPMC CS0 Use WAIT input
* SYSBOOT[8] = 0 GPMC CS0 8-bit data bus
* SYSBOOT[8] = 1 GPMC CS0 16-bit data bus
* Device Type = General Purpose (GP)
* SYSBOOT[7:6] = 11b RGMII no internal delay (EMAC boot modes only)
* SYSBOOT[5] = 0 CLKOUT1 disabled
* Boot Sequence : MMC0 -> SPI0 -> UART0 -> USB0

ROM: Current tracing vector, word 1 = 0x0010009e
* Bit 1 : [General] Entered main function
* Bit 2 : [General] Running after the cold reset
* Bit 3 : [Boot] Main booting routine entered
* Bit 4 : [Memory Boot] Memory booting started
* Bit 7 : [Boot] GP header found
* Bit 20 : [Configuration Header] CHSETTINGS found

ROM: Current tracing vector, word 1 = 0x00011000
* Bit 12 : [Memory Boot] Memory booting trial 0
* Bit 16 : [Memory Boot] Execute GP image

ROM: Current tracing vector, word 1 = 0x00001000
* Bit 12 : Memory booting device SPI

ROM: Current copy of PRM_RSTST = 0x00000000

ROM: Cold reset tracing vector, word 1 = 0x00000000

ROM: Cold reset tracing vector, word 1 = 0x00000000

ROM: Cold reset tracing vector, word 1 = 0x00000001
* Bit 0 : [Memory Boot] Memory booting device NULL

Cortex A8 Program Counter = 0x402f0440

ROM Exception Vectors
* 0x4030CE04 Undefined
* 0x4030CE08 SWI
* 0x4030CE0C Pre-fetch abort
* 0x4030CE10 Data abort
* 0x4030CE14 Unused
* 0x4030CE18 IRQ
* 0x4030CE1C FIQ

ROM Dead Loops
* 0x00020080 Undefined exception default handler
* 0x00020084 SWI exception default handler
* 0x00020088 Pre-fetch abort exception default handler
* 0x0002008C Data exception default handler
* 0x00020090 Unused exception default handler
* 0x00020094 IRQ exception default handler
* 0x00020098 FIQ exception default handler
* 0x0002009C Validation test PASS
* 0x000200A0 Validation test FAIL
* 0x000200A4 Reserved
* 0x000200A8 Image not executed or returned
* 0x000200AC Reserved
* 0x000200B0 Reserved
* 0x000200B4 Reserved
* 0x000200B8 Reserved
* 0x000200BC Reserved

Kindly help me at the earliest.

  • What are your SYSBOOT settings? What is your boot device? What Linux version are you trying to boot? The CONTROL_STATUS register shows you have set some SYSBOOT pins improperly.
  • Hello Biser,

    As per sysboot settings we are trying to boot from the  MMC0. 

    Sysboot Settings are 

    15:14 ----01b as our clock is 24Mhz

    13:12 are 00b 

    11:6 are random values as they are mentioned as dont cares in TRM

    5:0   110111b selecting MMC0 as the primary boot.

    we are trying to use the same linux that comes with the sdk 4.0 availbl inthe downloads of the AM335x software page.

    Regards

    Mad_hu

  • As per the above tracing vectors it i s understood that Memory card is deteted,GP Header detected and MLO has ben loaded into SRAM .
    Do we still need to suspect the SYSBOOT Settings?

    The customizations we did for our board are:
    1) PMIC is different than the one used in eval board but all the timings have been properly matched.It has no I2C interface.
    2)DDR3L is being used and the corresponding changes have been done in the ddr_defs.h file .
    3)Exact layout of eval board is not used so length matching is done while designing hardware and software levelling is doine using CCS. The laest values with which DDR tests are being passed are taken from the gel file and loaded into the board.c file .(DDR integrity and DDR EDMA tests are being passed)
    4) MLO, u-boot.img is created with these changes and is being loaded.

    If any software /Hardware needs to be rectified kindly help me at the earliest.


    Regards
    Mad_hu
  • Are you sure that SYSBOOT[13:12] are pulled-down to 00b at reset release time? Another thing to check is that you have external 4.7kOhm pullups on VDDSHV6 on the EMU0 and EMU1 pins.
  • Hello Biser,
    SYSBOOT[13:12] are pulled-down to 00b. You can see the follwoing log file as a proof for that. SYSBOOT[11:10] are continously showing as ILLEGAL values i.e. 11b even though their voltages are being changed .

    Also EMU0 and EMU1 pins are pulled up to VDDSHV6 using 4.7k


    CONTROL: device_id = 0x2b94402e
    * AM335x family
    * Silicon Revision 2.1

    PRM_DEVICE: PRM_RSTST = 0x00000001
    * Bit 0 : GLOBAL_COLD_RST

    CONTROL: control_status = 0x004f0377
    * SYSBOOT[15:14] = 01b (24 MHz)
    * SYSBOOT[11:10] = 11b ILLEGAL VALUE!
    * SYSBOOT[9] = 0 GPMC CS0 Ignore WAIT input
    * SYSBOOT[9] = 1 GPMC CS0 Use WAIT input
    * SYSBOOT[8] = 0 GPMC CS0 8-bit data bus
    * SYSBOOT[8] = 1 GPMC CS0 16-bit data bus
    * Device Type = General Purpose (GP)
    * SYSBOOT[7:6] = 01b RMII (EMAC boot modes only)
    * SYSBOOT[5] = 1 CLKOUT1 enabled
    * Boot Sequence : MMC0 -> SPI0 -> UART0 -> USB0

    ROM: Current tracing vector, word 1 = 0x0010009e
    * Bit 1 : [General] Entered main function
    * Bit 2 : [General] Running after the cold reset
    * Bit 3 : [Boot] Main booting routine entered
    * Bit 4 : [Memory Boot] Memory booting started
    * Bit 7 : [Boot] GP header found
    * Bit 20 : [Configuration Header] CHSETTINGS found

    ROM: Current tracing vector, word 1 = 0x00011000
    * Bit 12 : [Memory Boot] Memory booting trial 0
    * Bit 16 : [Memory Boot] Execute GP image

    ROM: Current tracing vector, word 1 = 0x00001000
    * Bit 12 : Memory booting device SPI

    ROM: Current copy of PRM_RSTST = 0x00000000

    ROM: Cold reset tracing vector, word 1 = 0x00000000

    ROM: Cold reset tracing vector, word 1 = 0x00000000

    ROM: Cold reset tracing vector, word 1 = 0x00000001
    * Bit 0 : [Memory Boot] Memory booting device NULL

    Cortex A8 Program Counter = 0x402f0440

    ROM Exception Vectors
    * 0x4030CE04 Undefined
    * 0x4030CE08 SWI
    * 0x4030CE0C Pre-fetch abort
    * 0x4030CE10 Data abort
    * 0x4030CE14 Unused
    * 0x4030CE18 IRQ
    * 0x4030CE1C FIQ

    ROM Dead Loops
    * 0x00020080 Undefined exception default handler
    * 0x00020084 SWI exception default handler
    * 0x00020088 Pre-fetch abort exception default handler
    * 0x0002008C Data exception default handler
    * 0x00020090 Unused exception default handler
    * 0x00020094 IRQ exception default handler
    * 0x00020098 FIQ exception default handler
    * 0x0002009C Validation test PASS
    * 0x000200A0 Validation test FAIL
    * 0x000200A4 Reserved
    * 0x000200A8 Image not executed or returned
    * 0x000200AC Reserved
    * 0x000200B0 Reserved
    * 0x000200B4 Reserved
    * 0x000200B8 Reserved
    * 0x000200BC Reserved



    Regards
    Mad_hu
  • OK, another thing that can stop MLO execution is the EEPROM check. If you do not have a board ID EEPROM on your board you should disable the EEPROM check in MLO/U-boot.
  • Hello Biser,

    Does this EEPROM IC dependency exists for this AM3358 SDK. If so, kindly help us in how to disable its dependency as we are not using this EEPROM.

    Regards
    Mad_hu
  • Hi Madhu,

    For how to disable EEPROM check in u-boot code, refer to the below e2e threads:

    e2e.ti.com/.../591641
    e2e.ti.com/.../2047516

    What I suspect is that the issue you have is not related to EEPROM, as you will get error messages regarding EEPROM later in your u-boot boot log. What I can suggest you is to configure the AM335x board to boot from UART and check if you will have "CCC...." stream on the console log, which means that ROM Code complete successful. Please check careful the below wiki page:

    processors.wiki.ti.com/.../AM335x_board_bringup_tips

    Regards,
    Pavel
  • Hello patel

    The problem is resolved now.
    As you said its not the problem of the EEPROM, its the problem of software levelling.we have rectified it.
    Now the boot process has reached upto the kernel execution but its not detecting the root file system which is residing on the SD card.

    I have not been using the card detect signal of sd card.
    Kindly let me know the changes that I need to do in the dts file and anywhere else .

    Regards
    Mad_hu
  • Madhu,

    Please close/verify/resolve that thread and open new one regarding the SD card detect signal issue.

    Regards,
    Pavel