RTOS/PROCESSOR-SDK-AM335X: Performance issue

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This is the code in my program. I got 2 HWI interrupts each one handling diffrent buffor. The interrupt goes on every 15 ms. One time for buffor0_Handler and after that the for buffor1_Handler. I think that this isn't too much code to procces for an 1 GHz Cortex A8 processsor and it still fail to be able to execute the interrupt code in 15 ms. Everything was fine when I was using the Linux SDK.

void buffor0_Handler(UArg arg0)
{
PRUICSS_pruClearEvent(handle, 18);
int *buffor_ptr = buffor0_start + 3;
UART_printf("Buffor 0 \n");
int j = 0;
for(;j<4000;j++)
{
*(iir1 + 2) = *(iir1 + 1);
*(iir1 + 1) = *(iir1);
*iir1 = *buffor_ptr;

*(iir1 + 3) = (*(iir1) * coeff[0] + *(iir1 + 1)*coeff[1] + *(iir1 + 2)*coeff[2] + *(iir1 + 4)*coeff[3] + *(iir1 + 5)*coeff[4])/32768;

for(int q = 1; q < 4; q++)
{
*(iir1 + 3 + q * 3) = (*(iir1 + q * 3)*coeff[0 + q * 5] + *(iir1 + 1 + q * 3)*coeff[1 + q * 5] + *(iir1 + 2 + q * 3)*coeff[2 + q * 5] + *(iir1 + 4 + q * 3)*coeff[3 + q * 5] + *(iir1 + 5 + q * 3)*coeff[4 + q * 5])/32768;

*(iir1 + 5 + (q-1) * 3) = *(iir1 + 4 + (q-1) * 3);
*(iir1 + 4 + (q-1) * 3) = *(iir1+ 3 + (q-1) * 3);
}

*(iir1 + 14) = *(iir1 + 13);
*(iir1 + 13) = *(iir1 + 12);

buffor_ptr++;

/**(iir1 + j) = *coeff * *buffor_ptr + *(coeff + 1) * *(buffor_ptr - 1) + *(coeff + 2) * *(buffor_ptr - 2) + *(coeff + 3) * *(iir1 + j - 1) + *(coeff + 4) * *(iir1 +j - 2) ;
*(iir2 + j) = *(coeff + 5) * *(iir1 + j) + *(coeff + 6) * *(iir1 + j - 1) + *(coeff + 7) * *(iir1 + j - 2) + *(coeff + 8) * *(iir2 + j -1) + *(coeff + 9) * *(iir2 +j - 2);
*(iir3 + j) = *(coeff + 10) * *(iir2 + j) + *(coeff + 11) * *(iir2 + j - 1) + *(coeff + 12) * *(iir2 + j - 2) + *(coeff + 13) * *(iir3 + j - 1) + *(coeff + 14) * *(iir3 + j - 2);
*(iir4 + j) = *(coeff + 15) * *(iir3 + j) + *(coeff + 16) * *(iir3 + j - 1) + *(coeff + 17) * *(iir3 + j - 2) + *(coeff + 18) * *(iir4 + j - 1) + *(coeff + 19) * *(iir4 + j - 2);*/
}
//PRUICSS_pruSendEvent(handle, 54);
}

void buffor1_Handler(UArg arg0)
{
PRUICSS_pruClearEvent(handle, 19);
int j = 0;
int *buffor_ptr = buffor1_start + 3;
for(;j<4000;j++)
{
*(iir1 + 2) = *(iir1 + 1);
*(iir1 + 1) = *(iir1);
*iir1 = *buffor_ptr;

*(iir1 + 3) = (*(iir1) * coeff[0] + *(iir1 + 1)*coeff[1] + *(iir1 + 2)*coeff[2] + *(iir1 + 4)*coeff[3] + *(iir1 + 5)*coeff[4])/32768;

for(int q = 1; q < 4; q++)
{
*(iir1 + 3 + q * 3) = (*(iir1 + q * 3)*coeff[0 + q * 5] + *(iir1 + 1 + q * 3)*coeff[1 + q * 5] + *(iir1 + 2 + q * 3)*coeff[2 + q * 5] + *(iir1 + 4 + q * 3)*coeff[3 + q * 5] + *(iir1 + 5 + q * 3)*coeff[4 + q * 5])/32768;

*(iir1 + 5 + (q-1) * 3) = *(iir1 + 4 + (q-1) * 3);
*(iir1 + 4 + (q-1) * 3) = *(iir1+ 3 + (q-1) * 3);
}

*(iir1 + 14) = *(iir1 + 13);
*(iir1 + 13) = *(iir1 + 12);
buffor_ptr++;
}

UART_printf("Buffor 1 \n");
//UART_printf("%d, %d, %d, %d \n\n",*(buffor0_start), *(buffor0_start + 1),*(buffor0_start + 2), *(buffor0_start + 3));

// PRUICSS_pruSendEvent(handle, 54);
}

My cfg file

/* ================ General configuration ================ */


var Defaults = xdc.useModule('xdc.runtime.Defaults');
var Diags = xdc.useModule('xdc.runtime.Diags');
var Error = xdc.useModule('xdc.runtime.Error');
var Main = xdc.useModule('xdc.runtime.Main');
var Memory = xdc.useModule('xdc.runtime.Memory')
var SysMin = xdc.useModule('xdc.runtime.SysMin');
var System = xdc.useModule('xdc.runtime.System');
var Text = xdc.useModule('xdc.runtime.Text');
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var SemihostSupport = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');
var Idle = xdc.useModule('ti.sysbios.knl.Idle');
var Timer = xdc.useModule('ti.sysbios.hal.Timer');
var Swi = xdc.useModule('ti.sysbios.knl.Swi');
var Task = xdc.useModule('ti.sysbios.knl.Task');
var Log = xdc.useModule('xdc.runtime.Log');
var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
var ti_sysbios_family_arm_a8_intcps_Hwi = xdc.useModule('ti.sysbios.family.arm.a8.intcps.Hwi');
var ti_sysbios_hal_Cache = xdc.useModule('ti.sysbios.hal.Cache');
/*
* Program.argSize sets the size of the .args section.
* The examples don't use command line args so argSize is set to 0.
*/
Program.argSize = 0x0;

/* System stack size (used by ISRs and Swis) */
Program.stack = 0x4000;

/*
* Uncomment this line to globally disable Asserts.
* All modules inherit the default from the 'Defaults' module. You
* can override these defaults on a per-module basis using Module.common$.
* Disabling Asserts will save code space and improve runtime performance.
Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;
*/
Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;


/*
* Uncomment this line to keep module names from being loaded on the target.
* The module name strings are placed in the .const section. Setting this
* parameter to false will save space in the .const section. Error and
* Assert messages will contain an "unknown module" prefix instead
* of the actual module name.
Defaults.common$.namedModule = false;
*/
Defaults.common$.namedModule = false;

/*
* Minimize exit handler array in System. The System module includes
* an array of functions that are registered with System_atexit() to be
* called by System_exit().
*/
System.maxAtexitHandlers = 4;

/*
* Uncomment this line to disable the Error print function.
* We lose error information when this is disabled since the errors are
* not printed. Disabling the raiseHook will save some code space if
* your app is not using System_printf() since the Error_print() function
* calls System_printf().
Error.raiseHook = null;
*/
Error.raiseHook = null;

/*
* Uncomment this line to keep Error, Assert, and Log strings from being
* loaded on the target. These strings are placed in the .const section.
* Setting this parameter to false will save space in the .const section.
* Error, Assert and Log message will print raw ids and args instead of
* a formatted message.
Text.isLoaded = false;
*/
Text.isLoaded = true;

/*
* Uncomment this line to disable the output of characters by SysMin
* when the program exits. SysMin writes characters to a circular buffer.
* This buffer can be viewed using the SysMin Output view in ROV.
*/
SysMin.flushAtExit = false;

/* Circular buffer size for System_printf() */
SysMin.bufSize = 128;
/*
* Create and install logger for the whole system
*/
var loggerBufParams = new LoggerBuf.Params();
loggerBufParams.numEntries = 4;
var logger0 = LoggerBuf.create(loggerBufParams);
Defaults.common$.logger = logger0;
Main.common$.diags_INFO = Diags.ALWAYS_ON;
/*
* Create and install logger for the whole system
*/
System.SupportProxy = SysMin;

/* ================ BIOS configuration ================ */
var BIOS = xdc.useModule('ti.sysbios.BIOS');
BIOS.libType = BIOS.LibType_Custom;
BIOS.customCCOpts = BIOS.customCCOpts.replace(" -g ","");
BIOS.assertsEnabled = false;
BIOS.logsEnabled = false;
BIOS.swiEnabled = false;

/*
* The BIOS module will create the default heap for the system.
* Specify the size of this default heap.
*/
BIOS.heapSize = 32000;
Program.sectionsExclude = ".*";

Clock.tickPeriod = 1000000;

/* ================ Driver configuration ================ */
var socType = "am335x";
/* Load the OSAL package */
var osType = "tirtos"
var Osal = xdc.useModule('ti.osal.Settings');
Osal.osType = osType;
Osal.socType = socType;

/*use CSL package*/

var Csl = xdc.loadPackage('ti.csl');
Csl.Settings.deviceType = socType;

/* Load the uart package */
var UartPackage = xdc.loadPackage('ti.drv.uart');

/* Load the I2C package */
var I2c = xdc.loadPackage('ti.drv.i2c');

/* Load the board package */
var Board = xdc.loadPackage('ti.board');
Board.Settings.boardName = "bbbAM335x";

/* Load Profiling package */
var Utils = xdc.loadPackage('ti.utils.profiling');

/* Load the gpio package */
var GpioPackage = xdc.loadPackage('ti.drv.gpio');
GpioPackage.Settings.enableProfiling = true;


var Pruss = xdc.loadPackage('ti.drv.pruss');
Pruss.Settings.socType = socType;

/* ================ Cache and MMU configuration ================ */

var Cache = xdc.useModule('ti.sysbios.family.arm.a8.Cache');
Cache.enableCache = true;

var Mmu = xdc.useModule('ti.sysbios.family.arm.a8.Mmu');
Mmu.enableMMU = true;

/* Force peripheral section to be NON cacheable strongly-ordered memory */
var peripheralAttrs = {
type : Mmu.FirstLevelDesc_SECTION, // SECTION descriptor
tex: 0,
bufferable : false, // bufferable
cacheable : false, // cacheable
shareable : true, // shareable
noexecute : true, // not executable
};

/* Define the base address of the 1 Meg page the peripheral resides in. */
var peripheralBaseAddr = 0x44e00400;;

/* Configure the corresponding MMU page descriptor accordingly */
Mmu.setFirstLevelDescMeta(peripheralBaseAddr,
peripheralBaseAddr,
peripheralAttrs);


/* Define the base address of the 1 Meg page the peripheral resides in. */
var peripheralBaseAddr = 0x481a6000;

/* Configure the corresponding MMU page descriptor accordingly */
Mmu.setFirstLevelDescMeta(peripheralBaseAddr,
peripheralBaseAddr,
peripheralAttrs);

/* Define the base address of the 1 Meg page the peripheral resides in. */
var peripheralBaseAddr = 0x4a300000;

/* Configure the corresponding MMU page descriptor accordingly */
Mmu.setFirstLevelDescMeta(peripheralBaseAddr,
peripheralBaseAddr,
peripheralAttrs);
/* Define the base address of the 1 Meg page the peripheral resides in. */
var peripheralBaseAddr = 0x40300000;

/* Configure the corresponding MMU page descriptor accordingly */
Mmu.setFirstLevelDescMeta(peripheralBaseAddr,
peripheralBaseAddr,
peripheralAttrs);

// For Cortex-A8
var Cache = xdc.useModule('ti.sysbios.family.arm.a8.Cache');

var Mmu = xdc.useModule('ti.sysbios.family.arm.a8.Mmu');

// Enable the cache
Cache.enableCache = true;

// Enable the MMU (Required for L1/L2 data caching)
Mmu.enableMMU = true;

// descriptor attribute structure for marking the memory region
// as normal cacheable memory (write-back and write-allocate)
var attrs = {
type: Mmu.FirstLevelDesc_SECTION, // SECTION descriptor
tex: 0x1,
bufferable: true, // bufferable
cacheable: true, // cacheable
shareable : true,
};

// Set the descriptor for each entry in the address range
for (var i=0x80000000; i < 0x90000000; i = i + 0x00100000) {
// Each 'SECTION' descriptor entry spans a 1MB address range
Mmu.setFirstLevelDescMeta(i, i, attrs);
}

var memmap = Program.cpu.memoryMap;
var DDR = null;

// Find DDR in memory map
for (var i=0; i < memmap.length; i++) {
if (memmap[i].name == "DDR") {
DDR = memmap[i];
}
}

// Place the MMU table in the DDR memory segment if it exists
if (DDR != null) {
var sectionName = "ti.sysbios.family.arm.a8.mmuTableSection";
Program.sectMap[sectionName] = new Program.SectionSpec();
Program.sectMap[sectionName].type = "NOLOAD"; // NOINIT for TI Tools
Program.sectMap[sectionName].loadSegment = "DDR";
}
else {
print("No DDR memory segment was found");
}

var task0Params = new Task.Params();
task0Params.instance.name = "null";
var task0 = Task.create("&taskInitPRUFxn", task0Params);

var ti_sysbios_family_arm_a8_intcps_Hwi0Params = new ti_sysbios_family_arm_a8_intcps_Hwi.Params();
ti_sysbios_family_arm_a8_intcps_Hwi0Params.instance.name = "buffor0";
ti_sysbios_family_arm_a8_intcps_Hwi0Params.type = ti_sysbios_family_arm_a8_intcps_Hwi.Type_IRQ;
Program.global.buffor0 = ti_sysbios_family_arm_a8_intcps_Hwi.create(20, "&buffor0_Handler", ti_sysbios_family_arm_a8_intcps_Hwi0Params);

Mmu.defaultAttrs.accPerm = 3;
Mmu.defaultAttrs.shareable = true;

var ti_sysbios_family_arm_a8_intcps_Hwi1Params = new ti_sysbios_family_arm_a8_intcps_Hwi.Params();
ti_sysbios_family_arm_a8_intcps_Hwi1Params.instance.name = "buffor1";
ti_sysbios_family_arm_a8_intcps_Hwi1Params.type = ti_sysbios_family_arm_a8_intcps_Hwi.Type_IRQ;
Program.global.buffor1 = ti_sysbios_family_arm_a8_intcps_Hwi.create(22, "&buffor1_Handler", ti_sysbios_family_arm_a8_intcps_Hwi1Params);

BIOS.cpuFreq.lo = 500000000;

Mmu.defaultAttrs.cacheable = true;

var heapMem0Params = new HeapMem.Params();
heapMem0Params.instance.name = "heapMem0";
heapMem0Params.size = 128000;
Program.global.heapMem0 = HeapMem.create(heapMem0Params);

Clock.tickMode = Clock.TickMode_DYNAMIC;
Clock.tickSource = Clock.TickSource_NULL;

Rafal,

1) There shouldn’t be any UART_printf in the ISR routine. Printfs are inherently slow.
2) Where is the coeff/iir1 buffer located? OCMC ram? OCMC ram is configured as non-cacheable and non-bufferable in *.cfg file.Otherwise, try DDR which is cacheable and shareable, assuming you have DDR in your design.
3) Please provide the .map file.

Lali

1) ok I'll change it.
2) I tried puting it on the OCMC ram and on the EMIF0 SDRAM I get the same result still working very slow. Setting OCMC ram to cacheable and bufferable will solve the performance issue? I'm using beaglebone black it has 512 DDR3 but I don't know the memory adress and I dont know how can I configure do you have any tutorials.
3) I don't have a .map file and I never used one were can I find it. Do you have any sites were I can read more about the .map file. What is it?

I change my .cfg file now the OCM is cacheable and bufferable but it didnt help with the performenc everything works very slow. :/ How can I add or use the DDR?






/* ================ General configuration ================ */
var Defaults = xdc.useModule('xdc.runtime.Defaults');
var Diags = xdc.useModule('xdc.runtime.Diags');
var Error = xdc.useModule('xdc.runtime.Error');
var Main = xdc.useModule('xdc.runtime.Main');
var Memory = xdc.useModule('xdc.runtime.Memory')
var SysMin = xdc.useModule('xdc.runtime.SysMin');
var System = xdc.useModule('xdc.runtime.System');
var Text = xdc.useModule('xdc.runtime.Text');
var Clock = xdc.useModule('ti.sysbios.knl.Clock');
var Semaphore = xdc.useModule('ti.sysbios.knl.Semaphore');
var HeapMem = xdc.useModule('ti.sysbios.heaps.HeapMem');
var SemihostSupport = xdc.useModule('ti.sysbios.rts.gnu.SemiHostSupport');
var Idle = xdc.useModule('ti.sysbios.knl.Idle');
var Timer = xdc.useModule('ti.sysbios.hal.Timer');
var Swi = xdc.useModule('ti.sysbios.knl.Swi');
var Task = xdc.useModule('ti.sysbios.knl.Task');
var Log = xdc.useModule('xdc.runtime.Log');
var LoggerBuf = xdc.useModule('xdc.runtime.LoggerBuf');
var ti_sysbios_family_arm_a8_intcps_Hwi = xdc.useModule('ti.sysbios.family.arm.a8.intcps.Hwi');
var ti_sysbios_hal_Cache = xdc.useModule('ti.sysbios.hal.Cache');
var LoggerCallback = xdc.useModule('xdc.runtime.LoggerCallback');
var LoggerSys = xdc.useModule('xdc.runtime.LoggerSys');
/*
* Program.argSize sets the size of the .args section.
* The examples don't use command line args so argSize is set to 0.
*/
Program.argSize = 0x0;

/* System stack size (used by ISRs and Swis) */
Program.stack = 0x4000;

/*
* Uncomment this line to globally disable Asserts.
* All modules inherit the default from the 'Defaults' module. You
* can override these defaults on a per-module basis using Module.common$.
* Disabling Asserts will save code space and improve runtime performance.
Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;
*/
Defaults.common$.diags_ASSERT = Diags.ALWAYS_OFF;


/*
* Uncomment this line to keep module names from being loaded on the target.
* The module name strings are placed in the .const section. Setting this
* parameter to false will save space in the .const section. Error and
* Assert messages will contain an "unknown module" prefix instead
* of the actual module name.
Defaults.common$.namedModule = false;
*/
Defaults.common$.namedModule = false;

/*
* Minimize exit handler array in System. The System module includes
* an array of functions that are registered with System_atexit() to be
* called by System_exit().
*/
System.maxAtexitHandlers = 4;

/*
* Uncomment this line to disable the Error print function.
* We lose error information when this is disabled since the errors are
* not printed. Disabling the raiseHook will save some code space if
* your app is not using System_printf() since the Error_print() function
* calls System_printf().
Error.raiseHook = null;
*/
Error.raiseHook = null;

/*
* Uncomment this line to keep Error, Assert, and Log strings from being
* loaded on the target. These strings are placed in the .const section.
* Setting this parameter to false will save space in the .const section.
* Error, Assert and Log message will print raw ids and args instead of
* a formatted message.
Text.isLoaded = false;
*/
Text.isLoaded = true;

/*
* Uncomment this line to disable the output of characters by SysMin
* when the program exits. SysMin writes characters to a circular buffer.
* This buffer can be viewed using the SysMin Output view in ROV.
*/
SysMin.flushAtExit =true;

/* Circular buffer size for System_printf() */
SysMin.bufSize = 128;
/*
* Create and install logger for the whole system
*/
var loggerBufParams = new LoggerBuf.Params();
loggerBufParams.numEntries = 4;
var logger0 = LoggerBuf.create(loggerBufParams);
Defaults.common$.logger = logger0;
Main.common$.diags_INFO = Diags.ALWAYS_ON;
/*
* Create and install logger for the whole system
*/
System.SupportProxy = SysMin;

/* ================ BIOS configuration ================ */
var BIOS = xdc.useModule('ti.sysbios.BIOS');
BIOS.libType = BIOS.LibType_Custom;
BIOS.customCCOpts = BIOS.customCCOpts.replace(" -g ","");
BIOS.assertsEnabled = false;
BIOS.logsEnabled = false;
BIOS.swiEnabled = false;

/*
* The BIOS module will create the default heap for the system.
* Specify the size of this default heap.
*/
BIOS.heapSize = 32000;
Program.sectionsExclude = ".*";

Clock.tickPeriod = 1000000;

/* ================ Driver configuration ================ */
var socType = "am335x";
/* Load the OSAL package */
var osType = "tirtos"
var Osal = xdc.useModule('ti.osal.Settings');
Osal.osType = osType;
Osal.socType = socType;

/*use CSL package*/

var Csl = xdc.loadPackage('ti.csl');
Csl.Settings.deviceType = socType;

/* Load the uart package */
var UartPackage = xdc.loadPackage('ti.drv.uart');

/* Load the I2C package */
var I2c = xdc.loadPackage('ti.drv.i2c');

/* Load the board package */
var Board = xdc.loadPackage('ti.board');
Board.Settings.boardName = "bbbAM335x";

/* Load Profiling package */
var Utils = xdc.loadPackage('ti.utils.profiling');

/* Load the gpio package */
var GpioPackage = xdc.loadPackage('ti.drv.gpio');
GpioPackage.Settings.enableProfiling = true;


var Pruss = xdc.loadPackage('ti.drv.pruss');
Pruss.Settings.socType = socType;

/* ================ Cache and MMU configuration ================ */

var Cache = xdc.useModule('ti.sysbios.family.arm.a8.Cache');
Cache.enableCache = true;

var Mmu = xdc.useModule('ti.sysbios.family.arm.a8.Mmu');
Mmu.enableMMU = true;

/* Force peripheral section to be NON cacheable strongly-ordered memory */
var peripheralAttrs = {
type : Mmu.FirstLevelDesc_SECTION, // SECTION descriptor
tex: 0,
bufferable : false, // bufferable
cacheable : false, // cacheable
shareable : true, // shareable
noexecute : true, // not executable
};

/* Define the base address of the 1 Meg page the peripheral resides in. */
var peripheralBaseAddr = 0x44e00400;;

/* Configure the corresponding MMU page descriptor accordingly */
Mmu.setFirstLevelDescMeta(peripheralBaseAddr,
peripheralBaseAddr,
peripheralAttrs);


/* Define the base address of the 1 Meg page the peripheral resides in. */
var peripheralBaseAddr = 0x481a6000;

/* Configure the corresponding MMU page descriptor accordingly */
Mmu.setFirstLevelDescMeta(peripheralBaseAddr,
peripheralBaseAddr,
peripheralAttrs);

/* Define the base address of the 1 Meg page the peripheral resides in. */
var peripheralBaseAddr = 0x4a300000;

/* Configure the corresponding MMU page descriptor accordingly */
Mmu.setFirstLevelDescMeta(peripheralBaseAddr,
peripheralBaseAddr,
peripheralAttrs);



var peripheralAttrs = {
type : Mmu.FirstLevelDesc_SECTION, // SECTION descriptor
tex: 0x1,
bufferable : true, // bufferable
cacheable : true, // cacheable
shareable : true, // shareable

};


var peripheralBaseAddr = 0x40300000;

/* Configure the corresponding MMU page descriptor accordingly */
Mmu.setFirstLevelDescMeta(peripheralBaseAddr,
peripheralBaseAddr,
peripheralAttrs);


var attrs = {
type: Mmu.FirstLevelDesc_SECTION, // SECTION descriptor
tex: 0x1,
bufferable: true, // bufferable
cacheable: true, // cacheable
shareable:true
};

// Set the descriptor for each entry in the address range
for (var i=0x80000000; i < 0x90000000; i = i + 0x00100000) {
// Each 'SECTION' descriptor entry spans a 1MB address range
Mmu.setFirstLevelDescMeta(i, i, attrs);
}

var memmap = Program.cpu.memoryMap;
var DDR = null;

// Find DDR in memory map
for (var i=0; i < memmap.length; i++) {
if (memmap[i].name == "DDR") {
DDR = memmap[i];
}
}

// Place the MMU table in the DDR memory segment if it exists
if (DDR != null) {
var sectionName = "ti.sysbios.family.arm.a8.mmuTableSection";
Program.sectMap[sectionName] = new Program.SectionSpec();
Program.sectMap[sectionName].type = "NOLOAD"; // NOINIT for TI Tools
Program.sectMap[sectionName].loadSegment = "DDR";
}
else {
print("No DDR memory segment was found");
}

var task0Params = new Task.Params();
task0Params.instance.name = "null";
task0Params.priority = 1;
var task0 = Task.create("&taskInitPRUFxn", task0Params);

var ti_sysbios_family_arm_a8_intcps_Hwi0Params = new ti_sysbios_family_arm_a8_intcps_Hwi.Params();
ti_sysbios_family_arm_a8_intcps_Hwi0Params.instance.name = "buffor0";
ti_sysbios_family_arm_a8_intcps_Hwi0Params.type = ti_sysbios_family_arm_a8_intcps_Hwi.Type_IRQ;
Program.global.buffor0 = ti_sysbios_family_arm_a8_intcps_Hwi.create(20, "&buffor0_Handler", ti_sysbios_family_arm_a8_intcps_Hwi0Params);


var ti_sysbios_family_arm_a8_intcps_Hwi1Params = new ti_sysbios_family_arm_a8_intcps_Hwi.Params();
ti_sysbios_family_arm_a8_intcps_Hwi1Params.instance.name = "buffor1";
ti_sysbios_family_arm_a8_intcps_Hwi1Params.type = ti_sysbios_family_arm_a8_intcps_Hwi.Type_IRQ;
Program.global.buffor1 = ti_sysbios_family_arm_a8_intcps_Hwi.create(22, "&buffor1_Handler", ti_sysbios_family_arm_a8_intcps_Hwi1Params);

BIOS.cpuFreq.lo = 500000000;


var heapMem0Params = new HeapMem.Params();
heapMem0Params.instance.name = "heapMem0";
heapMem0Params.size = 128000;
Program.global.heapMem0 = HeapMem.create(heapMem0Params);

Clock.tickMode = Clock.TickMode_DYNAMIC;
Clock.tickSource = Clock.TickSource_NULL;

Mmu.defaultAttrs.type = Mmu.FirstLevelDesc_SECTION;

I bring up back the linux evrything works very fast but i have there problems wich I wanted to solve using the Ti - RTOS but here the cortex A8 can't compute basic stuff in time