TMS320VC5502: I2C Slave read/write detection

Hi Steven,

The I2C master uses the R/W bit to distinguish between writes to the slave and reads from the slave.
My impression is that when the I2C is configured as a slave receiver, and the R/W bit from the master is a 1, then the I2C slave transitions from slave receiver to slave transmitter, and shifts out the data in I2CDXR. I would expect the XRDY bit to be set in the I2CSTR in that case.

When the slave receiver receives a R/W bit = 0, it should remain in slave receiver mode and shift in the data from the master into the I2CDRR register, and I would expect the RRDY bit to get set in the I2CSTR. I did not verify this behavior, however.

Do you observe the XRDY bit getting set when the master sends the R/W bit as 1 verses the RRDY bit being set when the master sends the R/W bit as a 0?

I don't believe you can determine if the slave went into transmitter or receiver mode by checking the TRX bit inside of I2CMDR. Table 7 in SPRU146D states that the TRX bit is a dont care when in slave mode with free data format disabled.

It would also be interesting if the R/W bit showed up in the I2CDRR register, but I don't expect it will.

My understanding is that the I2C hardware state machine automatically acts upon the R/W bit by either transitioning into slave transmitter mode and shifting out the contents of I2CDXR (R/W = 1) or remaining in slave receiver mode and shifting data from the master into the I2CDRR register (R/W = 0).

I will let you know if I find an I2C slave example for a different device with similar I2C IP.

Hope this helps,
Mark

Okay. Thanks for the detail.

Can you at least detect when the master has put the DSP into slave receiver mode by checking the RRDY bit?
Let me ask around to see how the software on other processors that support I2C slave mode handle detection of slave receiver vs slave transmitter. I did not find any I2C slave examples for C5502.

Regards,
Mark

Yes, you can infer that the device has been selected for writing when the RRDY bit comes along. However, you don't know if the master is reading or writing until _after_ receiving the first byte, some 25 to 30 us after the AAS bit goes high.

Most other I2C peripherals that I've used provide the value of bit 0 of the address and/or their transmitter ready indication is only active when the slave has been selected for reading.