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6416TGLZ current draw on 1.2

How much the 6416TGLZ should be drawing from the 1.2V while held in reset?

We are seeing near 1A while in reset, and about half that once we release reset.  This seems strange, and I am curious if this is normal.

Both the PCI and DSP resets are asserted.

Thanks,

Dano

  • Dano,

    There is a short period of time (up to 100us) after the reset is de-asserted during which the PLL's are latching and other chip activity drives higher than typical current that could reach 1A. But this is only after the deassertion of reset.  You should not see 1A current draw on the core supply while the device is held in reset.

    Best Regards,

    Chad

  • Thanks Chad,

    That's what I would expect.  Just this morning, we did however observe the 1.2V current draw on the Eval board (Spectrum Digital), and see 1A while in reset, and 500mA while running also (same as with our design).  The board provides a place to measure the 1.2V current draw (J1), so this was fairly easy.

    Doesn't make since to me, but at least we're both consistent  :)

    -Dano

     

  • Dano,

    Have you contacted Spectrum Digital about this observation?  Also, do you have test failures on this board?

    Best Regards,

    Chad