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6472EVM problem : simulation vs emulaiton

***
Prodigy 130 points

HI guys , I was testing  a newly bought  EVM6472 board in the past days. A codec program was used in the test: with one test sequence as the input, the same .exe run in both   a  SImulator session and a EMulator session(the EVM BOARD).Then the strange thing happens: the output sequences differed from each other!!!

I could make sure that the output sequence came from the simulation session was right but  the one from the emulaiton was wrong.

IN both sessions, I chose CPU_0 as the target, I alternated the other CORES as the target in emulation, and got the same output.

I believe that , there should be something wrong in the evm configuration but I just cannot get it. What could be  the possible cause???gel? endian?......

being eager for help, thanks in advance.

BTW, is network cable neccessary in my own emulaiton?I did not keep it plugged in properly during test.

 

 

  • 0
    TI__Mastermind 18136 points

    Hi,

    one  typical thing to look at in this is to look at zero initialization. In the simulator the memory is all zero after startup while on the real HW memory content is random. So if you forgot to initialize a variable to zero in your code this will not cause any trouble on the simulator but for sure on the real HW ....

     

    Kind regards,

    one and zero

  • 0 in reply to one and zero
    Prodigy 130 points

    Good to have such fast  reply.

    I run the same .exe on other boards ,such as DM642, TCI6482,  and I got the right results. Is 6472 special?

    Do I need to add the BSL lib into the project?   I did not have them in the simulation and the program run rightly. So is there something to do when changing simulation project into emulator project?

    I just donot  know how to configure the EVM, a new thing to me .

  • 0 in reply to ***
    TI__Mastermind 18136 points

    Hi,

    so this indcates that missing zero initialization is not the issue.

    Does the code use EDMA or DDR2? Is your memory map matching the 6472?

    Kind regards,

    one and zero

  • 0 in reply to one and zero
    Prodigy 130 points

    NO EDMA operations, but I use cache.

    And does  6472 have the same instruction set with 6482? The project was formerly a 6482 project. I noticed the memory map before,  the cmd was changed accordingly , I place my code in the segment started at 0x800000.(L2). I think this is not bad.

  • 0 in reply to ***
    TI__Mastermind 18136 points

    the core used in both devices is the same so no issue from that side. linking to address starting at 0x00800000 is fine. However the size of the local L2 on the 6472 is only 608k versus 2M on the 6482 ...

    Are you using the Chip support Library?

  • 0 in reply to one and zero
    Prodigy 130 points

    Maybe that's the question!!!

    I  did not add any csl lib files into the project.Thanks, I will check it.

  • 0 in reply to ***
    Prodigy 130 points

    Hi, I changed the mapping address, the code was placed in the mem started at 0xe0000000.

    And ,  I included the bsl  library in the project(by  build properties - ---- include option).

    But nothing different happened.

    Did I do something wrong?

  • 0 in reply to ***
    TI__Mastermind 18136 points

    Hi,

    0x00e000000 is the base adress of local L1P SRAM. So you need to configure L1P as memory mapped if you do so. If L1P is configured as cache this mapping will not work.

    Depending on what you do with you SW you might not need BSL or CSL.

    Did you enable the memory mao in the simulator?

    Kind regards,

    one and zero

  • 0 in reply to one and zero
    TI__Guru* 84110 points

    ***,

    Please describe what is different between the results you get when you use the simulator or DM642 for this codec vs. the results you get with Core0 of the EVMC6472. Many of the questions or ideas you have mentioned would imply that the program is not running to completion, but our advice has been assuming data comparison differences.

    You and "one and zero" are talking about different address ranges. one and zero has explained about using 0x00e00000 which is L1P while *** has moved the code to 0xe0000000 which is the DDR2 address for the C6472. This is one example of what I meant above, that if you were still using the DM642 SDRAM address of 0x80000000 then the program would not work at all - but the simulator may be more forgiving and might run even with the wrong memory address.

    Your description of the failure may prove helpful to us.

    RandyP

  • 0 in reply to RandyP
    Prodigy 130 points

    HI ,guys.Sorry I did not reply in time , so busy recently.

    The evm6472 was put aside currently. I am having another question  now,which is kind of similar with the  post topic.The codec was bad due to the not so well-written ASM function,  I did some pipeline kernel correction.Then I run the modified codec for test,  the question came out:  the same input sequence got the right output via simulator proccess session but got  the bad output by emulator!!!!!!! In both sessions , I used 6482 as the cpu...

    I did assembly sigle step debug, and found that some instrucion (mostly a SMPY/SMPY2 ) in one instruction packet  did not work , after 2 or 4 cycles the dst reg did not have the new outcome. I guess  it is because I have to  take optimization into consideration,  I tried to add as few instruction packets as possible and hence something originally ok was changed into a bad status.

    What maybe the cause?Sorry I am such a trouble.

  • 0 in reply to ***
    TI__Guru* 84110 points

    You are doing operations that demonstrate a very high skill-level. Not many people can competently write and optimize C64x+ assembly code, which is why we try to make the C compiler as good as possible. But it does require people with your skills to get the maximum possible performance out of the devices.

    The information you have given us is not enough for us to help you. You may need to show a disassembler window and register window to describe exactly what is happening.