AM5716: McASP EDMA events

Hi Pavel,

Thank you so much for your help!

if I understand correctly, DMA_ CROSSBAR Instance Number is actually event No.?

In my application, I will need EDMA channel 0, 1 triggered by McASP1 receive and transmit events respectively, and channel 2 triggered by McASP 2 receive event. From table 5-6 in this document, I see it is mapped by default. so I just need to enable EDMA events in EDMA_TPCC_EESR = 0x00000007( enable EDMA event 0,1,2) ?  do I need to set bit 0,1,3 in DSP_SYS_DMAWAKEEN0?

also, in my application, to create Ping-Pong buffer, channel0 is also linked to channel 64, 65  and channel 1 is linked to channel 67, 68 in PaRAM configuration. Do I need to change the default mapping of DMA_DSP1_DREQ_64,65,67,68 in table 5-6( those channels are reserved) and enable the corresponding events in EDMA_TPCC_EESR?

Thank you!

Ron

Rong Wang2 said:

if I understand correctly, DMA_ CROSSBAR Instance Number is actually event No.?

No, I do not think so.If we assume that McASP1 receive event number is 128, then it match the DMA_CROSSBAR default input index, 128 (0x80).

CTRL_CORE_DMA_DSP1_DREQ_0_1[7:0] DMA_DSP1_DREQ_0_IRQ_0 reset/default value is 0x80 (128), thus selecting McASP1 receive event (McASP1_DREQ_RX) to DMA_DSP1_DREQ_0/DMA_CROSSBAR_128. You can consider McASP1 receive event number as 0 (DMA_DSP1_DREQ_0) or 128 (DMA_CROSSBAR_128), but it is not 1.

McASP1 receive event number is 0 (DMA_DSP1_DREQ_0) locally for DSP subsystem and 128 (DMA_CROSSBAR_128) globally for the whole AM571x device.

Check also AM571x TRM sections:

16.1.3.2 Mapping of DMA Requests to DMA_CROSSBAR Inputs

24.6.3 McASP Integration

Rong Wang2 said:

In my application, I will need EDMA channel 0, 1 triggered by McASP1 receive and transmit events respectively, and channel 2 triggered by McASP 2 receive event. From table 5-6 in this document, I see it is mapped by default. so I just need to enable EDMA events in EDMA_TPCC_EESR = 0x00000007( enable EDMA event 0,1,2) ?  do I need to set bit 0,1,3 in DSP_SYS_DMAWAKEEN0?

Yes, these are enabled by default, you do not need to change registers CTRL_CORE_DMA_DSP1_DREQ_x.

Regarding DSP_SYS_DMAWAKEEN0, yes, you need to set up bits. In TRM is stated:

"The DMA request corresponding DSP_SYS_DMAWAKEEN0/DSP_SYS_DMAWAKEEN1 MUST be enabled, for the DMA requests to be serviced by the DSP regardless of the DSP being in IDLE or active state."

Per mine understanding, to enable EDMA event 0,1,2, you need to set bit 0,1,2.

Rong Wang2 said:

so I just need to enable EDMA events in EDMA_TPCC_EESR = 0x00000007( enable EDMA event 0,1,2) ?

Regarding EDMA programming, check sections:

5.3.7 DSP Integrated EDMA Subsystem

16.2 Enhanced DMA

Regards,
Pavel

Rong Wang2 said:

also, in my application, to create Ping-Pong buffer, channel0 is also linked to channel 64, 65  and channel 1 is linked to channel 67, 68 in PaRAM configuration. Do I need to change the default mapping of DMA_DSP1_DREQ_64,65,67,68 in table 5-6( those channels are reserved) and enable the corresponding events in EDMA_TPCC_EESR?

These are reserved (N/A) because these can not be used. How do you plan to change the default mapping of DMA_DSP1_64? In which AM571x register? DMA_DSP1_DREQ_0 default mapping is controlled in CTRL_CORE_DMA_DSP1_DREQ_0_1register, and I do not find CTRL_CORE_DMA_DSP1_DREQ_64_65 register in AM571x TRM.

Regards,
Pavel