CCS/66AK2H14: MCSDK clink example not working.

Dear Eric,

I am using CCS Version: 7.4.0.00015 and MCSDK version: mcsdk_3_01_04_07_setupwin32. please tell me if I am using the older one because I recently download both of them. I am unable to find initilization file for 66AK2H platform also whenever I change clint example target to 66AK2H from 6636K2H it wont work.

clint example always stuck in CSL_IDEF_INLINE void CSL_SerdesWaitForSigDet(uint32_t base_addr, uint32_t lane_num)

Please use Processor SDK RTOS 4.2 for K2H, the CCS is 7.3.0, See the link for download:
software-dl.ti.com/.../index_FDS.html

Regards, Eric

Dear Eric,

I have now updated to SDK RTOS 4.2 for K2H.

I am unable to find initialisation file for my EVM  66AK2H.

when I open GEL file from

../../emulation/boards/xtcievmk2x/gel/xtcievmk2x.gel  

* Filename: evmtci6638k2k.gel
* Description: Utility GEL for use with the TCI6638K2K EVM.

Now I do not have TCI6638K2K on my EVM insted I have 66AK2H on my EVM board.

I try to find 66AK2H EVM in ../../emulation/boards/ directory b ut there is nothing like that.

Now the only reason  that client example not work is that my board PLL is not configured correctly.

Please tell my where is 66AK2H EVM GEL file??????????

Regards, Umer

Hi,

The GEL file for K2H is the same as for K2K, please use those under ccsv7\ccs_base\emulation\boards\xtcievmk2x\gel

Regards, Eric

I have selected the GEL file mentioned by you and I have the following console output

C66xx_0: GEL Output:
Connecting Target...
C66xx_0: GEL Output: TCI6638K2K GEL file Ver is 1.70000005
C66xx_0: GEL Output: Detected PLL bypass disabled: SECCTL[BYPASS] = 0x00000000
C66xx_0: GEL Output: (3a) PLLCTL = 0x00000040
C66xx_0: GEL Output: (3b) PLLCTL = 0x00000040
C66xx_0: GEL Output: (3c) Delay...
C66xx_0: GEL Output: (4)PLLM[PLLM] = 0x0000000F
C66xx_0: GEL Output: MAINPLLCTL0 = 0x07000000
C66xx_0: GEL Output: (5) MAINPLLCTL0 = 0x07000000
C66xx_0: GEL Output: (5) MAINPLLCTL1 = 0x00000040
C66xx_0: GEL Output: (6) MAINPLLCTL0 = 0x07000000
C66xx_0: GEL Output: (7) SECCTL = 0x00090000
C66xx_0: GEL Output: (8a) Delay...
C66xx_0: GEL Output: PLL1_DIV3 = 0x00008002
C66xx_0: GEL Output: PLL1_DIV4 = 0x00008004
C66xx_0: GEL Output: PLL1_DIV7 = 0x00000000
C66xx_0: GEL Output: (8d/e) Delay...
C66xx_0: GEL Output: (10) Delay...
C66xx_0: GEL Output: (12) Delay...
C66xx_0: GEL Output: (13) SECCTL = 0x00090000
C66xx_0: GEL Output: (Delay...
C66xx_0: GEL Output: (Delay...
C66xx_0: GEL Output: (14) PLLCTL = 0x00000041
C66xx_0: GEL Output: PLL has been configured (CLKIN * PLLM / PLLD / PLLOD = PLLOUT):
C66xx_0: GEL Output: PLL has been configured (122.879997 MHz * 16 / 1 / 2 = 983.039978 MHz)
C66xx_0: GEL Output: DISABLESTAT ---> 0x000007FF
C66xx_0: GEL Output: Power on all PSC modules and DSP domains...
C66xx_0: GEL Output: Power on all PSC modules and DSP domains... Done.
C66xx_0: GEL Output: WARNING: SYSCLK is the input to the PA PLL.
C66xx_0: GEL Output: Completed PA PLL Setup
C66xx_0: GEL Output: PAPLLCTL0 - before: 0x0x09080500 after: 0x0x09080500
C66xx_0: GEL Output: PAPLLCTL1 - before: 0x0x00002040 after: 0x0x00002040
C66xx_0: GEL Output: DDR begin
C66xx_0: GEL Output: XMC setup complete.
C66xx_0: GEL Output: DDR3 PLL (PLL2) Setup ...
C66xx_0: GEL Output: DDR3 PLL Setup complete, DDR3A clock now running at 666 MHz.
C66xx_0: GEL Output: DDR3A initialization complete
C66xx_0: GEL Output: DDR3 PLL Setup ...
C66xx_0: GEL Output: DDR3 PLL Setup complete, DDR3B clock now running at 800MHz.
C66xx_0: GEL Output: DDR3B initialization complete
C66xx_0: GEL Output: DDR done

Does it means that every thing that is required to run clint example is successfully configured on my 66AK2H EVM???

The cling application is still stuck at:

CSL_IDEF_INLINE void CSL_SerdesWaitForSigDet(uint32_t base_addr, uint32_t lane_num)
{
uint32_t retval = 0;

while(retval != 1)
{
retval = (CSL_SERDES_STATUS)CSL_FEXTR(*(volatile uint32_t *)
(base_addr + 0x1ff4), (0 + lane_num), (0 + lane_num));
}
}

 

Can you please tell me why am I facing that problem and how to get out from that? 

Hi,

It looks to be SGMII Serdes issue. The MCSDK support was obsolete and there is NIMU test application in Processor SDK RTOS 4.2: processors.wiki.ti.com/.../Processor_SDK_RTOS_NDK We tested it and worked.

Regards, Eric

Hi,

Thank you for you response.

I do not think that its SGMII Issue. After debugging application I come to know that configSerdes(); is called from platform.c

if (p_flags->phy) {
configSerdes();
Init_SGMII(0);
//Init_SGMII(1);
}

when I step inside the configSerdes(); function there its call another function which is called from evmc66x_phy.c

void CSL_SgmiiDefSerdesSetup()
{
uint32_t i;
CSL_SERDES_RESULT csl_retval;
CSL_SERDES_LANE_ENABLE_STATUS lane_retval = CSL_SERDES_LANE_ENABLE_NO_ERR;
CSL_SERDES_LANE_ENABLE_PARAMS_T serdes_lane_enable_params;

memset(&serdes_lane_enable_params, 0, sizeof(serdes_lane_enable_params));

serdes_lane_enable_params.base_addr = CSL_NETCP_SERDES_CFG_REGS;
serdes_lane_enable_params.ref_clock = CSL_SERDES_REF_CLOCK_156p25M;
serdes_lane_enable_params.linkrate = CSL_SERDES_LINK_RATE_1p25G;
serdes_lane_enable_params.num_lanes = 4;
serdes_lane_enable_params.phy_type = SERDES_SGMII;
for(i=0; i< serdes_lane_enable_params.num_lanes; i++)
{
serdes_lane_enable_params.lane_ctrl_rate[i] = CSL_SERDES_LANE_QUARTER_RATE;
serdes_lane_enable_params.loopback_mode[i] = CSL_SERDES_LOOPBACK_DISABLED;

/* When RX auto adaptation is on, these are the starting values used for att, boost adaptation */
serdes_lane_enable_params.rx_coeff.att_start[i] = 7;
serdes_lane_enable_params.rx_coeff.boost_start[i] = 5;

/* For higher speeds PHY-A, force attenuation and boost values */
serdes_lane_enable_params.rx_coeff.force_att_val[i] = 1;
serdes_lane_enable_params.rx_coeff.force_boost_val[i] = 1;

/* CM, C1, C2 are obtained through Serdes Diagnostic BER test */
serdes_lane_enable_params.tx_coeff.cm_coeff[i] = 0;
serdes_lane_enable_params.tx_coeff.c1_coeff[i] = 0;
serdes_lane_enable_params.tx_coeff.c2_coeff[i] = 0;
serdes_lane_enable_params.tx_coeff.tx_att[i] = 12;
serdes_lane_enable_params.tx_coeff.tx_vreg[i] = 4;
}

serdes_lane_enable_params.lane_mask = (1 << serdes_lane_enable_params.num_lanes) - 1;
serdes_lane_enable_params.operating_mode = CSL_SERDES_FUNCTIONAL_MODE;

/* Att and Boost values are obtained through Serdes Diagnostic PRBS calibration test */
/* For higher speeds PHY-A, force attenuation and boost values */
serdes_lane_enable_params.forceattboost = CSL_SERDES_FORCE_ATT_BOOST_DISABLED;

/* SB CMU and COMLANE and Lane Setup */
csl_retval = CSL_EthernetSerdesInit(serdes_lane_enable_params.base_addr,
serdes_lane_enable_params.ref_clock,
serdes_lane_enable_params.linkrate);

/* Common Init Mode */
/* Iteration Mode needs to be set to Common Init Mode first with a lane_mask value equal to the total number of lanes being configured */
/* The lane_mask is a don't care for Common Init as it operates on all lanes. It always sets it to 0xF internally in the API */
serdes_lane_enable_params.iteration_mode = CSL_SERDES_LANE_ENABLE_COMMON_INIT;
serdes_lane_enable_params.lane_mask = 0xF;
lane_retval = CSL_SerdesLaneEnable(&serdes_lane_enable_params);

/* Lane Init Mode */
/* Once CSL_SerdesLaneEnable is called with iteration_mode = CSL_SERDES_LANE_ENABLE_COMMON_INIT, the lanes needs to be enabled by setting
iteration_mode = CSL_SERDES_LANE_ENABLE_LANE_INIT with the lane_mask equal to the specific lane being configured */
/* For example, if lane 0 is being configured, lane mask needs to be set to 0x1. if lane 1 is being configured, lane mask needs to be 0x2 etc */
serdes_lane_enable_params.iteration_mode = CSL_SERDES_LANE_ENABLE_LANE_INIT;
for(i=0; i< serdes_lane_enable_params.num_lanes; i++)
{
     serdes_lane_enable_params.lane_mask = 1<<i;
     lane_retval = CSL_SerdesLaneEnable(&serdes_lane_enable_params);
}
}

And in this function the statement serdes_lane_enable_params.num_lanes = 4; is creating the problem because I have only two lanes on my EVM66AK2H bord.

so when I change num_lanes from 4 to 2 and build the project and debug the application is still displays num_lanes = 4 and I do not know why this is happening.

Please tell me why the changes in evmc66x_phy.c are not updated in my project.

 

Hi,

I tried MCSDK 3.1.4.7 client example I saw the same issue, however the MCSDK is obsolete and we have no plan to fix it. You mentioned you change the code num_lanes from 4 to 2, but it didn't take effects. You need to look at the CCS project and map file, how that file is linked, is it from a library like platform.lib? Also try to make some syntax error in that file you changed, then build it, did you see any error?

I suggested you to try the hello world example from Processor SDK RTOS 4.2.

Regards, Eric

Hi,

I have successfully build and run the client example. but I am not getting IP from DHCP.

[C66xx_0] QMSS successfully initialized
CPPI successfully initialized
PA successfully initialized

TCP/IP Stack Example Client
Configuring DHCP client
PASS successfully initialized
Ethernet subsystem successfully initialized
Ethernet eventId : 48 and vectId (Interrupt) : 7
Registration of the EMAC Successful, waiting for link up ..
Service Status: DHCPC : Enabled : : 000
Service Status: Telnet : Enabled : : 000
Service Status: HTTP : Enabled : : 000
Service Status: DHCPC : Enabled : Running : 000

This is the console output I just wait for the long time but it does not move forward and just stay here. can you please tell me where I am wrong or what is happening arround.

Regards, Umer

 

Hi,

Try to use the fixed IP, there should be some setting on the EVM:

// If the IP address is specified, manually configure IP and Gateway
#if defined(_SCBP6618X_) || defined(_EVMTCI6614_) || defined(DEVICE_K2H) || defined(DEVICE_K2K) || defined(DEVICE_K2E) || defined(DEVICE_K2L)
/* SCBP6618x, EVMTCI6614, EVMK2H, EVMK2K always uses DHCP */
if (0)
#else
if (!platform_get_switch_state(1))
#endif
{

You can directly override the code just use the fixed IP. I am not sure if DHCP worked or not, you can debug it with Wireshark for packet trace if it is EVM failed or DHCP server problem.

BTW, the same program in Processor SDK RTOS only supports fixed IP, not DHCP.

Regards, Eric

Dear Eric

I have successfully Build and run the UDP Eco client example ans I test it using Hercules.

My next task is to transmit Ethernet packet without using IP protocol. so I have to work on EMAC layer.

Can you please tell me which layers should I need to bypass to work on EMAC layer. we need maximum throughput so we cant afford IP overhead. 

I also want to know is it possible to make direct connection on 66AK2H EVM board with my laptop using Ethernet  so I can bypass router.

Let me know as well if there is any example project for EMAC packet transfer designed for high throughput.

Regards, Umer 

 

Hi,

Actually I do not want to use any IP address because its should be a point to point communication with only MAC address. I just want to send RAW Ethernet frames from EVM to my laptop.

In UDP ECHO example there is only 14 Mbits/s and that is very very low as compared to 1 Gb/s Interface. 

Is there any low level example that only send and receive raw Ethernet.

Thanks 

You can try the PA EMAC example under processors.wiki.ti.com/.../Processor_SDK_RTOS_PA. The driver simply send a pre-defined data packet out, when configured in no-loopback mode, you can receive it with your PC.

Regards, Eric

Dear Eric

I tried EMAC example located at  C:\ti\pdk_keystone2_3_01_04_07\packages\ti\drv\pa\example\emacExample. This example works when I use it in internal loop-back but when I change it to external loop-back OR No loop-back it is sucked in 

/* Wait for SGMII Link */
if (!cpswSimTest)
{
do
{
CSL_SGMII_getStatus(macPortNum, &sgmiiStatus);
}

while (sgmiiStatus.bIsLinkUp != 1);

while on on both Ethernet jack I see the link LED is UP and showing 1Gbps Link status.

I am using EVM66A K2H.

Can you please tell me why SGMII Link is not found in this example.  what are the possible reasons for this behaviour.

one thing I noticed that there is no platform_init function calling from main in this example. 

 

Hi,

The PA example doesn't need platform library. If you find that SGMII link is not up, you need to check which SGMII port is it? Maybe the code defined two ports for testing, the EVM has 2 RJ-45, do you have both of them connected to a network? Or you need to modify the test application with SGMII port number you used for testing.

Regards, Eric

Yes on my EVM there are to RJ-45 connector and as per my knowledge on is connected to SGMII(0) and another is to SGMII(1). I connect both port with each other that is one end of cable is connected to phy0 and another end of cable is connected to phy1 like external loop back.

In client example SGMII Initialisation successfully performed from platform init function but in EMAC example it just stuck. 

Is there any thing wrong in connecting to phy ports with each other.