I have noticed in the TI AM437x TRM (spruhl7h.pdf), section 12.2.2 MagneticCard Reader Clock and Reset Management lists a requirement for ADC1 that the frequency of ocp_clock must be greater than or equal to six times the frequency of adc_clk.
It appears that this requirement is not present in section 11.2.2 TSC_ADC (ADC0) Clock and Reset management. Does the same adc_clk frequency requirement exist for ADC0 as it does for ADC1?
Thanks,
Stuart