We have a number of designs that utilize DMA over the PCIe peripheral as a root complex to transmit blocks of data between the DSP and our FPGA. In these designs, the DSP is the root complex and the FPGA is the endpoint. One such design is using the C6674 DSP. For diagnostic purposes, we are interested in the timing of DMA completion of writes to the FPGA. The closest monitor that we found for the PCIe write transaction completion is to monitor the outbound buffer empty bit (OB_NOT_EMPTY) of the PCIeSS Activity Status Register (ACT_STATUS). This allows us to see when DMA actually writes data into the PCIeSS peripheral.
I realize that the PCIe controller of the AM571x is very different than the C6674. I was looking for something in the application registers for the AM571x PCIe controller that mirrors the ACT_STATUS register of the C6674, but have been unsuccessful thus far. There is a PCIe specification register (device status, PCIECTRL_EP_DBICS_DEV_CAS) that has a "transaction pending" bit, but this is related to non-posted requests (read) and is not applicable to our case.
My question is then, is there any register that I can read on the AM571x to monitor the status of outgoing PCIe writes? More generally, is there any way for the DSP to know if the resulting PCIe write packets of a DMA transfer writing to the PCIe peripheral have all been sent?
Thank you for your help,
Sean
