TMS320C6748: Clock pulse is not generated while using SPI recieve function in starterware sdk

SPI transmits and receives at the same time. As the transmit register is clocked out, the receive register is filled. The SPITransmitData1() loads the transmit register and starts clocking it out. The SPIDataReceive() reads the receive register containing the data received in the previous tx/rx. It does NOT cause clock pulses. In cases, you might want just to receive, you must send a dummy word for every word you want to receive.

EDIT: Forgot a "NOT".

Yes this one I can understand. My problem is when I send a dummy word in SPI transmit,I could see the reply word in MISO line in oscilloscope but the return value of the SPIDataReceive() function is always ZERO.

I am using C6748LCDK  board and using "C6748_StarterWare_1_20_04_01" sdk.

Another doubt:

In my application When I send 2 SPITransmit word I will recieve reply in the Third SPITransmit. In this case Should I need to put SPIDataReceive() function in all SPItransmit function or I can put it in the third SPITransmit only.

Thanks & regards

Navaneetha krishnan.

Are you checking the SPIFLG register before calling the transmit and receive functions? Something like this:

void SpiPolledTransfer(unsigned int   baseAdd,
                       unsigned char *tx,
                       unsigned char *rx,
                       int n)
{
  int itx = n;
  int irx = n;
  SPIDataReceive(baseAdd); // Dummy read to clear out rx reg
  while(itx && irx)
  {
    if(SPIIntStatus(baseAdd, SPI_TRANSMIT_INT))
    {
      SPITransmitData1(baseAdd, *tx++);
      itx--;
    }
    if(SPIIntStatus(baseAdd, SPI_RECV_INT))
    {
      *rx++ = (unsigned char)SPIDataReceive(baseAdd);
      irx--;
    }
  }
}

The above code has not been compiled or tested.

Hello Norman Wong ,

Thanks for your response,

I used the above code still I am not getting the return value in spiRecieve() function. In the scope picture u can see the SCK and MISO lines. Iam getting the value in 3rd cycle. I have attached the registry values also.

I am interfacing Tms320C6748 with MCP2515 through SPI0. The value I am getting in MISO line which I see through scope is correct. But I am not getting this in the SPIRecieve function.

Also I checked the SPI0_MISO by configuring it as GPIO8[6] and given GPIO output HIGH and I could see the HIGH value in scope. By this I can confirm the value reaches the SPI0_MISO pin of the DSP.

I dont know what I am missing.

Kindly help me in this regards.

521177 103
R PC 0x0000000B 0xC0003DAC
R CLK 0x0000000B 0x00000000
R SP 0x0000000B 0xC000A6F0
R FP 0x0000000B 0xC000A700
R A0 0x0000000B 0x00000100
R A1 0x0000000B 0x00000000
R A2 0x0000000B 0x00000000
R A3 0x0000000B 0x00000400
R A4 0x0000000B 0x0000000A
R A5 0x0000000B 0xFFFFFFFF
R A6 0x0000000B 0x00000001
R A7 0x0000000B 0x00000000
R A8 0x0000000B 0xC000C3BC
R A9 0x0000000B 0x00000000
R A10 0x0000000B 0xC000C9F0
R A11 0x0000000B 0xC000B2CC
R A12 0x0000000B 0xC000CE20
R A13 0x0000000B 0x00000025
R A14 0x0000000B 0x00000000
R A15 0x0000000B 0xC000B2E0
R A16 0x0000000B 0xC000B410
R A17 0x0000000B 0x00000000
R A18 0x0000000B 0x00000078
R A19 0x0000000B 0x00000064
R A20 0x0000000B 0x0000006C
R A21 0x0000000B 0x0000004C
R A22 0x0000000B 0x4D966FD8
R A23 0x0000000B 0x967AF1C8
R A24 0x0000000B 0x0BC6D163
R A25 0x0000000B 0xF1A4E55D
R A26 0x0000000B 0x00000000
R A27 0x0000000B 0x7FFFFFFF
R A28 0x0000000B 0x00000000
R A29 0x0000000B 0x00000000
R A30 0x0000000B 0x00000040
R A31 0x0000000B 0x00000001
R B0 0x0000000B 0x00000006
R B1 0x0000000B 0x00000003
R B2 0x0000000B 0x00000000
R B3 0x0000000B 0xC0003D92
R B4 0x0000000B 0x00000000
R B5 0x0000000B 0xC000B952
R B6 0x0000000B 0x00000080
R B7 0x0000000B 0x01800104
R B8 0x0000000B 0x0000007F
R B9 0x0000000B 0x00000000
R B10 0x0000000B 0xC000A260
R B11 0x0000000B 0x00000000
R B12 0x0000000B 0xC000A280
R B13 0x0000000B 0xC000901C
R B14 0x0000000B 0xC000C3A8
R B15 0x0000000B 0xC000A718
R B16 0x0000000B 0x000006B0
R B17 0x0000000B 0x00000001
R B18 0x0000000B 0x6C52E8BE
R B19 0x0000000B 0x0BD2652C
R B20 0x0000000B 0x00000069
R B21 0x0000000B 0x7E5E5379
R B22 0x0000000B 0x0000000F
R B23 0x0000000B 0x00000000
R B24 0x0000000B 0x747A6827
R B25 0x0000000B 0x90D940B8
R B26 0x0000000B 0xF477D7E4
R B27 0x0000000B 0x5784D52B
R B28 0x0000000B 0x5AE2C600
R B29 0x0000000B 0x293E005A
R B30 0x0000000B 0x00000003
R B31 0x0000000B 0x00000200
R AMR 0x0000000B 0x00000000
R CSR 0x0000000B 0x14000101
R IFR 0x0000000B 0x00004000
R ISR 0x0000000B 0x00004000
R ICR 0x0000000B 0x00000000
R IER 0x0000000B 0x00000013
R ISTP 0x0000000B 0xC0006C00
R IRP 0x0000000B 0x00000000
R NRP 0x0000000B 0x00000000
R ERP 0x0000000B 0x00000000
R TSCL 0x0000000B 0x807251A4
R TSCH 0x0000000B 0x000000FA
R ARP 0x0000000B 0x00000000
R ILC 0x0000000B 0x00000000
R RILC 0x0000000B 0x00000000
R PCE1 0x0000000B 0xC0003F14
R DNUM 0x0000000B 0x00000001
R FADCR 0x0000000B 0x00000000
R FAUCR 0x0000000B 0x00000000
R FMCR 0x0000000B 0x00000000
R SSR 0x0000000B 0x00000000
R GPLYA 0x0000000B 0x00000000
R GPLYB 0x0000000B 0x00000000
R GFPGFR 0x0000000B 0x0700001D
R DIER 0x0000000B 0x00000000
R TSR 0x0000000B 0x00008407
R ITSR 0x0000000B 0x00000404
R NTSR 0x0000000B 0x00010204
R ETSR 0x0000000B 0x00010204
R EFR 0x0000000B 0x00000002
R ECR 0x0000000B 0x00000002
R IERR 0x0000000B 0x00000001
R SYSCFG0_REVID 0x0000000B 0x4E840102
R SYSCFG0_DIEIDR0 0x0000000B 0x0A018015
R SYSCFG0_DIEIDR1 0x0000000B 0x00637C13
R SYSCFG0_DIEIDR2 0x0000000B 0x00000080
R SYSCFG0_DIEIDR3 0x0000000B 0x6C9C0005
R SYSCFG0_DEVIDR0 0x0000000B 0x1B7D102F
R SYSCFG0_BOOTCFG 0x0000000B 0x00000010
R SYSCFG0_CHIPREVIDR 0x0000000B 0x00000005
R SYSCFG0_KICK0R 0x0000000B 0x00000000
R SYSCFG0_KICK1R 0x0000000B 0x00000000
R SYSCFG0_HOST0CFG 0x0000000B 0x00000000
R SYSCFG0_HOST1CFG 0x0000000B 0x00700001
R SYSCFG0_IRAWSTAT 0x0000000B 0x00000000
R SYSCFG0_IENSTAT 0x0000000B 0x00000000
R SYSCFG0_IENSET 0x0000000B 0x00000000
R SYSCFG0_IENCLR 0x0000000B 0x00000000
R SYSCFG0_EOI 0x0000000B 0x00000000
R SYSCFG0_FLTADDRR 0x0000000B 0x00000000
R SYSCFG0_FLTSTAT 0x0000000B 0x00000000
R SYSCFG0_MSTPRI0 0x0000000B 0x44442222
R SYSCFG0_MSTPRI1 0x0000000B 0x44440000
R SYSCFG0_MSTPRI2 0x0000000B 0x04604404
R SYSCFG0_PINMUX0 0x0000000B 0x00000000
R SYSCFG0_PINMUX1 0x0000000B 0x00000000
R SYSCFG0_PINMUX2 0x0000000B 0x00000000
R SYSCFG0_PINMUX3 0x0000000B 0x00101111
R SYSCFG0_PINMUX4 0x0000000B 0x00002200
R SYSCFG0_PINMUX5 0x0000000B 0x00000000
R SYSCFG0_PINMUX6 0x0000000B 0x00000000
R SYSCFG0_PINMUX7 0x0000000B 0x10110010
R SYSCFG0_PINMUX8 0x0000000B 0x11111111
R SYSCFG0_PINMUX9 0x0000000B 0x11111111
R SYSCFG0_PINMUX10 0x0000000B 0x00000000
R SYSCFG0_PINMUX11 0x0000000B 0x00000000
R SYSCFG0_PINMUX12 0x0000000B 0x01100000
R SYSCFG0_PINMUX13 0x0000000B 0x00000000
R SYSCFG0_PINMUX14 0x0000000B 0x00000000
R SYSCFG0_PINMUX15 0x0000000B 0x00000000
R SYSCFG0_PINMUX16 0x0000000B 0x00000000
R SYSCFG0_PINMUX17 0x0000000B 0x00000000
R SYSCFG0_PINMUX18 0x0000000B 0x80800000
R SYSCFG0_PINMUX19 0x0000000B 0x00000000
R SYSCFG0_SUSPSRC 0x0000000B 0xFFFFFFFF
R SYSCFG0_CHIPSIG 0x0000000B 0x00000000
R SYSCFG0_CHIPSIG_CLR 0x0000000B 0x00000000
R SYSCFG0_CFGCHIP0 0x0000000B 0xC0000100
R SYSCFG0_CFGCHIP1 0x0000000B 0x00000000
R SYSCFG0_CFGCHIP2 0x0000000B 0x000209F2
R SYSCFG0_CFGCHIP3 0x0000000B 0x0000FF00
R SYSCFG0_CFGCHIP4 0x0000000B 0x0000FF00
R SPI0_SPIGCR0 0x0000000B 0x00000001
R SPI0_SPIGCR1 0x0000000B 0x01000003
R SPI0_SPIINT0 0x0000000B 0x00000000
R SPI0_SPILVL 0x0000000B 0x00000300
R SPI0_SPIFLG 0x0000000B 0x01000300
R SPI0_SPIPC0 0x0000000B 0x01010E00
R SPI0_SPIPC1 0x0000000B 0x00010600
R SPI0_SPIPC2 0x0000000B 0x00000117
R SPI0_SPIPC3 0x0000000B 0x00000000
R SPI0_SPIPC4 0x0000000B 0x00000000
R SPI0_SPIPC5 0x0000000B 0x00000000
R SPI0_SPIDAT0 0x0000000B 0x00000000
R SPI0_SPIDAT1 0x0000000B 0x00000000
R SPI0_SPIBUF 0x0000000B 0x00000000
R SPI0_SPIEMU 0x0000000B 0x00000000
R SPI0_SPIDELAY 0x0000000B 0x00000000
R SPI0_SPIDEF 0x0000000B 0x00000010
R SPI0_SPIFMT_4 0x0000000B 0x00012408
R SPI0_INTVEC_2 0x0000000B 0x00000000
R SYSCFG1_VTPIO_CTL 0x0000000B 0x0018E1F7
R SYSCFG1_DDR_SLEW 0x0000000B 0x00000000
R SYSCFG1_DEEPSLEEP 0x0000000B 0x0000FFFF
R SYSCFG1_PUPD_ENA 0x0000000B 0xFFFFFFFF
R SYSCFG1_PUPD_SEL 0x0000000B 0xC3FFFFFF
R SYSCFG1_RXACTIVE 0x0000000B 0xFFFFFFFF
R SYSCFG1_PWRDN 0x0000000B 0x00000001

/**

* \file spi.c

*

* \brief  This is a sample application file which invokes some APIs

*         from the SPI device abstraction layer to perform configuration,

*         transmission and reception operations.

*/

/*

* Copyright (C) 2012 Texas Instruments Incorporated -

*

*  Redistribution and use in source and binary forms, with or without

*  modification, are permitted provided that the following conditions

*  are met:

*

*    Redistributions of source code must retain the above copyright

*    notice, this list of conditions and the following disclaimer.

*

*    Redistributions in binary form must reproduce the above copyright

*    notice, this list of conditions and the following disclaimer in the

*    documentation and/or other materials provided with the  

*    distribution.

*

*    Neither the name of Texas Instruments Incorporated nor the names of

*    its contributors may be used to endorse or promote products derived

*    from this software without specific prior written permission.

*

*  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS

*  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT

*  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR

*  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT

*  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,

*  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT

*  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,

*  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY

*  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT

*  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE

*  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.

*/

#include "gpio.h"

#include <string.h>

#include "soc_C6748.h"

#include "hw_psc_C6748.h"

#include "lcdkC6748.h"

#include "uart.h"

#include "spi.h"

#include "psc.h"

#include "interrupt.h"

#include "uartStdio.h"

#include "MCP2515.h"

#include "hw_types.h"

#include "hw_syscfg0_OMAPL138.h"

/******************************************************************************

**                      INTERNAL MACRO DEFINITIONS

*******************************************************************************/

/* value to configure SMIO,SOMI,CLK and CS pin as functional pin */

#define SIMO_SOMI_CLK_CS        0x00000E00

#define SIMO_SOMI_CLK_CS_DIR       0x00000600

#define SIMO_SOMI_CLK_CS_DIR1       0x00000000

#define CHAR_LENGTH             0x8

/******************************************************************************

**                      INTERNAL FUNCTION PROTOTYPES

*******************************************************************************/

static void SPIConfigDataFmtReg(unsigned int dataFormat);

static void Delay(volatile unsigned int count);

static void SpiTransfer(void);

static void SetUpInt(void);

static void SetUpSPI(void);

static void GPIOIsr(void);

static void SpiPolledTransfer(unsigned int   baseAdd, unsigned char *tx, volatile unsigned char *rx,   int n);

/*static void GetStatusCommand(void);

static void ResetCommand(void);*/

void SPIIsr(void);

/******************************************************************************

**                      INTERNAL VARIABLE DEFINITIONS

*******************************************************************************/

volatile unsigned int flag = 1;

unsigned int tx_len;

unsigned int rx_len;

unsigned char vrf_data[260];

unsigned char tx_data[260];

volatile unsigned char rx_data[260];

unsigned char *p_tx;

volatile unsigned char *p_rx;//volatile

volatile unsigned char StatusResponseMessage[16];

volatile unsigned char test_d;

/******************************************************************************

**                      INTERNAL FUNCTION DEFINITIONS

*******************************************************************************/

unsigned char readRegister(unsigned char address)

{

/* Send read instruction, address, and receive result */

//spiMasterChipSelect(1);

GPIOPinWrite(SOC_GPIO_0_REGS, 139, GPIO_PIN_LOW);

Delay(10);

tx_data[0] = READ_INSTRUCTION; //0x03

tx_data[1] = address; //0x6C

tx_data[2] = 0x00;

tx_len = 3;

rx_len =3;

p_tx = &tx_data[0];

p_rx = &rx_data[0];

SpiPolledTransfer(SOC_SPI_0_REGS,p_tx,p_rx,rx_len);

  // SpiTransfer(); Not getting the result in rx_data[2]

   unsigned char  buffer = rx_data[2];

Delay(10);

GPIOPinWrite(SOC_GPIO_0_REGS, 139, GPIO_PIN_HIGH);

return buffer;

}

int main(void)

{

unsigned int savePinmux = 0;

int i;

   /* Waking up the SPI1 instance. */

PSCModuleControl(SOC_PSC_0_REGS, HW_PSC_SPI0, PSC_POWERDOMAIN_ALWAYS_ON,PSC_MDCTL_NEXT_ENABLE);

PSCModuleControl(SOC_PSC_1_REGS, HW_PSC_GPIO, PSC_POWERDOMAIN_ALWAYS_ON,PSC_MDCTL_NEXT_ENABLE);

/* Configuring GPIO8[10] as output pin for Chipselect*/

savePinmux =  HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(18));

savePinmux &= ~(SYSCFG_PINMUX18_PINMUX18_31_28);

   savePinmux |=  (SYSCFG_PINMUX18_PINMUX18_31_28_GPIO8_10 <<  SYSCFG_PINMUX18_PINMUX18_31_28_SHIFT);

HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(18)) = savePinmux;

   GPIODirModeSet(SOC_GPIO_0_REGS, 139, GPIO_DIR_OUTPUT);

   /* Performing the Pin Multiplexing for SPI1. */

   SPIPinMuxSetup(0);

     /* Configuring and enabling the SPI1 instance. */

   SetUpSPI();

   Delay(1000);

   SetUpInt();

   while(1)

   {

    unsigned char dd= readRegister(0x6C);

    if ( (dd & 0x07) == 0x07 )

    {

    printf("Success");

    }

      Delay(10);

   }

}

void Delay (volatile unsigned int count)

{

   while(count--);

}

static void SetUpInt(void)

{

   /****** Configuration of GPIO Interrupt ***********/

   IntDSPINTCInit();

   IntGlobalEnable();

   // Register the ISR in the vector table

IntRegister(C674X_MASK_INT4, SPIIsr);

// Map system interrupt to the DSP maskable interrupt

IntEventMap(C674X_MASK_INT4, SYS_INT_SPI0_INT);

// Enable the DSP maskable interrupt

IntEnable(C674X_MASK_INT4);

   IntGlobalEnable();

}

/*

** Configures SPI Controller

**

*/

static void SetUpSPI(void)

{

unsigned char cs  = 0x10;

   unsigned char dcs = 0x10;

   unsigned int  val = SIMO_SOMI_CLK_CS;

   unsigned int  val1 = SIMO_SOMI_CLK_CS_DIR;

SPIReset(SOC_SPI_0_REGS);

   SPIOutOfReset(SOC_SPI_0_REGS);

   SPIModeConfigure(SOC_SPI_0_REGS, SPI_MASTER_MODE);

   //SPIClkConfigure(SOC_SPI_1_REGS, 150000000, 20000000, SPI_DATA_FORMAT0);

   SPIClkConfigure(SOC_SPI_0_REGS,150000000, 4000000, SPI_DATA_FORMAT0);//0

   SPIPinControl(SOC_SPI_0_REGS, 0, 0, &val);

   SPIPinControl(SOC_SPI_0_REGS,1, 0,&val1  );

   SPIDefaultCSSet(SOC_SPI_0_REGS, dcs);

   /* Configures SPI Data Format Register */

   SPIConfigDataFmtReg(SPI_DATA_FORMAT0);

    /* map interrupts to interrupt line INT1 */

   SPIIntLevelSet(SOC_SPI_0_REGS, SPI_RECV_INTLVL | SPI_TRANSMIT_INTLVL);

   /* Enable SPI communication */

   SPIEnable(SOC_SPI_0_REGS);

}

/*

** Configures Data Format register of SPI

**

*/

static void SPIConfigDataFmtReg(unsigned int dataFormat)

{

   /* Configures the polarity and phase of SPI clock */

   /*

SPIConfigClkFormat(SOC_SPI_1_REGS,

                      (SPI_CLK_POL_HIGH | SPI_CLK_INPHASE),

                      dataFormat);

   */

 SPIConfigClkFormat(SOC_SPI_0_REGS,

                      ( SPI_CLK_POL_LOW |SPI_CLK_OUTOFPHASE ),

                      dataFormat);

   /* Configures SPI to transmit MSB bit First during data transfer */

   SPIShiftMsbFirst(SOC_SPI_0_REGS, dataFormat);

   /* Sets the Charcter length */

   SPICharLengthSet(SOC_SPI_0_REGS, CHAR_LENGTH, dataFormat);

}

/*

** Enables SPI Transmit and Receive interrupt.

** Deasserts Chip Select line.

*/

static void  SpiTransfer(void)

{

   p_tx = &tx_data[0];

   p_rx = &rx_data[0];

   SPIIntEnable(SOC_SPI_0_REGS, (SPI_RECV_INT | SPI_TRANSMIT_INT));

   while(flag);

   flag = 1;

  // Deasserts the CS pin(line)

   //SPIDat1Config(SOC_SPI_0_REGS, SPI_DATA_FORMAT0, 0x04);

}

void SpiPolledTransfer(unsigned int   baseAdd,

                      unsigned char *tx,

                      volatile unsigned char *rx,

                      int n)

{

 int itx = n;

 int irx = n;

 SPIDataReceive(baseAdd); // Dummy read to clear out rx reg

 while(itx && irx)

 {

   if(SPIIntStatus(baseAdd, SPI_TRANSMIT_INT))

   {

     SPITransmitData1(baseAdd, *tx++);

     itx--;

   }

   if(SPIIntStatus(baseAdd, SPI_RECV_INT))

   {

     *rx++ = (unsigned char)SPIDataReceive(baseAdd);

     irx--;

   }

 }

}

/*

** Data transmission and receiption SPIIsr

**

*/

void SPIIsr(void)

{

   unsigned int intCode = 0;

#ifdef _TMS320C6X

   IntEventClear(SYS_INT_SPI0_INT);

#else

   IntSystemStatusClear(56);

#endif

   intCode = SPIInterruptVectorGet(SOC_SPI_0_REGS);

   while (intCode)

   {

       if(intCode == SPI_TX_BUF_EMPTY)

       {

           tx_len--;

           SPITransmitData1(SOC_SPI_0_REGS, *p_tx);

           p_tx++;

           if (!tx_len)

           {

               SPIIntDisable(SOC_SPI_0_REGS, SPI_TRANSMIT_INT);

           }

       }

       if(intCode == SPI_RECV_FULL)

       {

           rx_len--;

           *p_rx = (char)SPIDataReceive(SOC_SPI_0_REGS);

           if(p_rx!=0x00)

           p_rx++;

           if (!rx_len)

           {

               flag = 0;

               SPIIntDisable(SOC_SPI_0_REGS, SPI_RECV_INT);

           }

       }

       intCode = SPIInterruptVectorGet(SOC_SPI_0_REGS);

   }

}

/******************************* End of file *********************************/

Thanks & Regards

Navaneetha krishnan

Hello Norman Wong,

I change the code as below. But still I didnt receive any word from the SPIrecieve function.

  //  SPIPinMuxSetup(0);

//SPI0_S0MI
    savePinmux =  HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3));
        savePinmux &= ~(SYSCFG_PINMUX3_PINMUX3_11_8);
        savePinmux |=  (SYSCFG_PINMUX3_PINMUX3_11_8_SPI0_SOMI0 <<  SYSCFG_PINMUX3_PINMUX3_11_8_SHIFT);
        HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3)) = savePinmux;

//SPI0_SIMO
        savePinmux =  HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3));
        savePinmux &= ~(SYSCFG_PINMUX3_PINMUX3_15_12);
        savePinmux |=  (SYSCFG_PINMUX3_PINMUX3_15_12_SPI0_SIMO0 <<  SYSCFG_PINMUX3_PINMUX3_15_12_SHIFT);
        HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3)) = savePinmux;

//SPI0_CLK
        savePinmux =  HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3));
        savePinmux &= ~(SYSCFG_PINMUX3_PINMUX3_3_0);
        savePinmux |=  (SYSCFG_PINMUX3_PINMUX3_3_0_SPI0_CLK<<  SYSCFG_PINMUX3_PINMUX3_3_0_SHIFT);
        HWREG(SOC_SYSCFG_0_REGS + SYSCFG0_PINMUX(3)) = savePinmux;

I tested the same code in another LCDKC6748 board and found  RXDATA of  SPIBUF registry gets the MISO value as we see in the scope.

RXDATA    0000000010000111    Receive data    

But the array variable rx_data[2] where the return value of SPIreceive() function is to be stored is showing 0xFF.

Thanks & Regards

Navaneetha krishnan