Other Parts Discussed in Thread: AM5718
Hi
I read the TRM about the QSPI module on my AM5718 processor and I also studied the qspi example
provided with the platform delevopment kit (PDK) V1.08, included in SDK V4.01.00 for TI-RTOS.
I try to read and write from/to the QSPI NOR flash included in the IDK5718 EVM.
To access flash devices via QSPI the TRM recommends to use the memory mapped mode of the QSPI module.
The TRM (spruhz7g, chapter 24.5.4.1.2, page 5851) says about memory mapped mode:
====================================================
A read sequence is converted into the following actions:
1. SPI chip-select goes active.
2. Read command byte is issued.
3. 1 to 4 address bytes, which correspond to the first address supplied, are issued.
4. 0 to 3 dummy bytes are issued, if “fast read” is supported.
5. Data bytes are read from the external SPI flash memory.
6. SPI chip-select goes inactive.
For linear addressing mode, action 5 is repeated until the byte count to be transferred reaches zero.
A write sequence is identical to a read sequence, except that a write sequence does not use dummy
bytes.
====================================================
At the moment I'm not able to send more than 32Bits of data to the flash device before the chip select
signal automatically returns to inactive state (step 6 above). How can I achieve that step 5 is repeated
for more than four bytes?
I tried the following to write to memory mapped qspi region:
*(uint8_t *)pDst = *(uint8_t *)pSrc; // -> Step 5 puts 8 bits on the data line
*(uint16_t *)pDst = *(uint16_t *)pSrc; // -> Step 5 puts 16 bits on the data line
*(uint32_t *)pDst = *(uint32_t *)pSrc; // -> Step 5 puts 32 bits on the data line
*(uint64_t *)pDst = *(uint64_t *)pSrc; // -> converted to two 32-bit writes with chip select going inactive between them
memcpy() did not help.
After four Bytes step 5 is aborted and chip select returns inactive.
This results in very low performance, since before the QSPI flash device will accept another
write access I have to issue a WriteEnable command which is not possible in memory mapped mode.
So I even cannot use EDMA to write more than 32bits of data at once.
Any ideas?
regards,
Markus