TDA2SG: TDA2SG EMIF1 ECC

Dean Hogle

Part Number: TDA2SG
Other Parts Discussed in Thread: TDA2, AM5728

The current ECC architecture of aligned cache line writes, on EMIF1, (for TDA2SGBRQ (AM5728)) from only the core initiators (no IO initiators supported) is to limiting and not able to support the memory interface access schemes we have implemented. Is there a form, fit and function TDA2 device (pin compatible) supported by TI that would support non-aligned cache line writes from both core and IO initiators?

I am getting the above information on ECC scheme for EMIF1 from Errata i922

over 7 years ago

0 Mariya Petkova over 7 years ago

TI__Expert 4885 points

Hi, Dean Hogle,

Check this thread if it can help:

Regards,

Mariya

0 Dean Hogle over 7 years ago in reply to Mariya Petkova

Prodigy 70 points

Hi Mariya- The link you gave me is my issue that Barend (FAE TI) told me to enter into this portal. Based on the link only quanta sized lines (full cache lines) can be written with ECC and only from ARM and DSP not IO. This is our issue, we want to have the ability to carry ECC on the DDR interface from all initiators and not be restricted to full cache line writes, meaning we need the capability to do read/modify/writes. Is there pin compatible TDA2 solutions that provide this solution? or other options?
Thanks
Dean

0 Yordan Kamenov over 7 years ago in reply to Dean Hogle

TI__Mastermind 42515 points

Hi Dean,

can you check if this application report can help you:
www.ti.com/.../sprac42a.pdf

Regards,
Yordan

0 Rishabh Garg over 7 years ago in reply to Dean Hogle

TI__Guru 55685 points

Hi Dean,

Read modify write with ECC enabled is not supported on TDA2xx device. You can use TDA2Px SoC which has a version that is pin compatible with TDA2xx.

Regards,
Rishabh

0 Dean Hogle over 7 years ago in reply to Yordan Kamenov

Prodigy 70 points

Review of the sprac42a App note confirms the short comings of the EMIF 1 ECC implementation but does not resolve or help my initial request which is a pin compatible replacement or other options.
Thanks
Dean

0 Rishabh Garg over 7 years ago in reply to Dean Hogle

TI__Guru 55685 points

Hi Dean,

As I stated in my previous reply you can see TDA2Px-ABZ which is pin compatible with TDA2xx and supports ECC with read modify write functionality.

Regards,
Rishabh

0 Dean Hogle over 7 years ago in reply to Rishabh Garg

Prodigy 70 points

HI Rishabh- Can you confirm if the the TDA2Px-ABZ supports ECC with RMW from all memory sources (core and IO initiators)?

Thanks
Dean

0 Rishabh Garg over 7 years ago in reply to Dean Hogle

TI__Guru 55685 points

Hi Dean,

If the ECC referred here is EMIF ECC then the answer is yes.

Regards,
Rishabh

0 Dean Hogle over 7 years ago in reply to Rishabh Garg

Prodigy 70 points

Rishabh- I did a quick comparison of the TDA2XX datasheet to the TDA2Px and it appears that secure boot and ISS are additional features and besides that the chips are identical, can you confirm? Is there a app note or white paper that documents this that you can share with me? Do you have any information on pricing, is the TDA2XX and TDA2Px on par with each other?

Thanks
Dean

0 Rishabh Garg over 7 years ago in reply to Dean Hogle

TI__Guru 55685 points

Hi Dean,

These are pin compatible chips, not identical. TDA2Px has more features/IPs. Please contact TI FAE for pricing.
This information is documented in chapter 1 of TDA2Px TRM:www.ti.com/.../spruif0a.pdf.

Regards,
Rishabh

0 Dean Hogle over 7 years ago in reply to Rishabh Garg

Prodigy 70 points

Hi Rishabh- The link you provided does not allow me to see the .pdf, says document not found. Can you update link. Also is there an app note that documents the ECC implementation for the TDA2Px that you can share?

Thanks
Dean

0 Rishabh Garg over 7 years ago in reply to Dean Hogle

TI__Guru 55685 points

Hi Dean,

Can you try this link: www.ti.com/.../getliterature.tsp
From implementation perspective everything is same as TDA2xx. Only addition is RMW bit (REG_RMW_EN) that needs to be enabled in EMIF_ECC_CTRL_REG. Unfortunately the ECC app note is not updated for TDA2Px implementation.

Regards,
Rishabh

0 Rishabh Garg over 7 years ago in reply to Rishabh Garg

TI__Guru 55685 points

Dean,

It seems that "." is getting attached to the hyperlink at the end. Kindly remove it and try: www.ti.com/general/docs/lit/getliterature.tsp?baseLiteratureNumber=SPRUIF0&fileType=pdf

Regards,
Rishabh

0 Rishabh Garg over 7 years ago in reply to Rishabh Garg

TI__Guru 55685 points

Hi Dean,

I haven’t heard back from you, I’m assuming you were able to resolve your issue. If not, just post a reply below (or create a new thread if the thread has locked due to time-out)

Regards,
Rishabh

0 Dean Hogle over 7 years ago in reply to Rishabh Garg

Prodigy 70 points

Hi Rishabh-
The TDA2P appears to have the ECC coverage we need. I am in the process now of understanding the production availability of the device.

Thank you for your help/support on this.

0 Rishabh Garg over 7 years ago in reply to Dean Hogle

TI__Guru 55685 points

Hi,

Thanks for the confirmation.

Regards,
Rishabh

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TDA2SG: TDA2SG EMIF1 ECC