• State Resolved
  • Locked Locked
  • Replies 1 reply
  • Subscribers 98 subscribers
  • Views 989 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

Any reason for 2 separate heaps: ddralgheap, ddr2

Bálint Pámer
Prodigy 180 points

Hi!

 

I'd like to ask if there is any specific reason behind the usual dsp memory config, when using codec engine:

Defining a (usually big) memory area for heap only (DDRALGHEAP), and an other for loading the dsp side code+data, and heap for DSP/BIOS objects (DDR2)?

Why not use DDR2 for code+data only, and have DDRALGHEAP for heap?

 

Thanks in advance:

Pámer Bálint

  • 0
    TI__Genius 17205 points

    This is a good question.

    The reason we recommend splitting it is that the DDR2 section (DSP's code/data) must be accessed by both ARM (to load) and DSP (to run), while DDRALGHEAP only needs to be accessed by the DSP.  By splitting these sections, we can reduce the memory the ARM-side OS (e.g. Linux) needs to map into each DSP-using process's space, which can save on virtual memory pages.

    As you mentioned, DDRALGHEAP can get quite large, and by not mapping these large memory buffers into each DSP-using Linux app's process space, we save all the memory Linux would have used to map those virtual page tables.

    The 'map or not map into Linux addr space' decision is made by Codec Engine during config, and indicated to DSP Link when it loads the DSP.  You can see the subtle difference if you run your Linux app with CE_DEBUG=2, looking for the following trace, and noticing the 'shared' value (in red):

    @1,301,101us: [+2 T:0x4096e490] OP - Processor_create_d> Initializing DSP PROC...
    @1,301,169us: [+2 T:0x4096e490] OP - Processor_create_d> Using DspLink config data for entry #0 [server 'video_copy.x64P']
    @1,301,285us: [+2 T:0x4096e490] OP - Processor_create_d> Adding DSP segment #0 to Link configuration: name='DDR2', startAddress=0x82c00000, sizeInBytes=0x300000, shared=1
    @1,301,389us: [+2 T:0x4096e490] OP - Processor_create_d> Adding DSP segment #1 to Link configuration: name='DSPLINKMEM', startAddress=0x82f01000, sizeInBytes=0xff000, shared=1
    @1,301,481us: [+2 T:0x4096e490] OP - Processor_create_d> Adding DSP segment #2 to Link configuration: name='RESET_VECTOR', startAddress=0x82f00000, sizeInBytes=0x1000, shared=1
    @1,301,570us: [+2 T:0x4096e490] OP - Processor_create_d> Adding DSP segment #3 to Link configuration: name='L4PER', startAddress=0x49000000, sizeInBytes=0x800000, shared=0
    @1,635,383us: [+2 T:0x4096e490] OP - Processor_create_d> Adding DSP segment #4 to Link configuration: name='DDRALGHEAP', startAddress=0x83000000, sizeInBytes=0x1000000, shared=0
    @1,635,511us: [+2 T:0x4096e490] OP - Processor_create_d> Adding DSP segment #5 to Link configuration: name='L4CORE', startAddress=0x48000000, sizeInBytes=0x1000000, shared=0

    To your other question, I think the BIOS objects can go in either DDR2 or DDRALGHEAP.  We generally keep DDRALGHEAP as a heap for just the algorithms.

    Chris